CRIS Current Research Information System

ROSSI, DAVIDE
 Distribuzione geografica
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Continente #
NA - Nord America 17.058
AS - Asia 10.892
EU - Europa 9.337
Continente sconosciuto - Info sul continente non disponibili 731
SA - Sud America 575
AF - Africa 566
OC - Oceania 28
Totale 39.187
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Nazione #
US - Stati Uniti d'America 16.393
CN - Cina 2.831
SG - Singapore 2.826
IT - Italia 2.375
VN - Vietnam 2.338
GB - Regno Unito 1.913
DE - Germania 1.668
HK - Hong Kong 869
SE - Svezia 661
FR - Francia 592
CA - Canada 558
IN - India 477
BR - Brasile 425
KR - Corea 373
BD - Bangladesh 319
RU - Federazione Russa 319
NL - Olanda 295
FI - Finlandia 273
IE - Irlanda 237
JP - Giappone 205
CI - Costa d'Avorio 167
ZA - Sudafrica 154
ES - Italia 139
CH - Svizzera 136
BG - Bulgaria 124
UA - Ucraina 117
ID - Indonesia 89
SC - Seychelles 89
TR - Turchia 87
TW - Taiwan 85
PH - Filippine 77
AT - Austria 76
EE - Estonia 75
BE - Belgio 66
PL - Polonia 66
TG - Togo 64
AR - Argentina 59
TH - Thailandia 44
GR - Grecia 41
JO - Giordania 40
IQ - Iraq 39
MX - Messico 38
PK - Pakistan 33
MY - Malesia 32
EC - Ecuador 29
RO - Romania 28
HR - Croazia 26
IR - Iran 24
AU - Australia 23
EG - Egitto 20
SA - Arabia Saudita 20
CR - Costa Rica 19
CZ - Repubblica Ceca 18
UZ - Uzbekistan 18
CL - Cile 15
CO - Colombia 15
IL - Israele 15
LT - Lituania 14
MA - Marocco 14
NG - Nigeria 14
DK - Danimarca 13
LB - Libano 13
DZ - Algeria 12
PY - Paraguay 12
PT - Portogallo 11
JM - Giamaica 10
AE - Emirati Arabi Uniti 9
BY - Bielorussia 7
ET - Etiopia 7
KE - Kenya 7
LU - Lussemburgo 7
NP - Nepal 7
PE - Perù 7
DO - Repubblica Dominicana 6
NO - Norvegia 6
TT - Trinidad e Tobago 6
VE - Venezuela 6
HN - Honduras 5
NZ - Nuova Zelanda 5
SI - Slovenia 5
TN - Tunisia 5
BO - Bolivia 4
GH - Ghana 4
GT - Guatemala 4
IS - Islanda 4
LV - Lettonia 4
PA - Panama 4
PS - Palestinian Territory 4
SK - Slovacchia (Repubblica Slovacca) 4
SV - El Salvador 4
AL - Albania 3
HU - Ungheria 3
KG - Kirghizistan 3
KZ - Kazakistan 3
MD - Moldavia 3
OM - Oman 3
PR - Porto Rico 3
A2 - ???statistics.table.value.countryCode.A2??? 2
AZ - Azerbaigian 2
BA - Bosnia-Erzegovina 2
Totale 38.425
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Città #
Ann Arbor 4.237
Singapore 2.015
Southend 1.388
Ashburn 1.120
Fairfield 923
Dallas 881
Hong Kong 774
Bologna 647
San Jose 637
Chandler 601
Hefei 579
Wilmington 529
Ho Chi Minh City 510
Santa Clara 499
Woodbridge 479
Hanoi 468
Munich 459
Houston 396
Seattle 395
Montréal 394
Cambridge 344
Mcallen 334
Seoul 303
Council Bluffs 278
Dong Ket 275
Princeton 271
Beijing 267
Los Angeles 256
Dublin 233
Boardman 214
New York 195
Milan 176
Helsinki 172
Abidjan 167
Lauterbourg 166
Turin 140
Tokyo 132
Nanjing 117
Sofia 117
Buffalo 109
Westminster 105
Berlin 104
Redmond 93
Medford 89
Rome 87
Da Nang 79
Frankfurt am Main 79
Bengaluru 70
Redondo Beach 70
Chicago 68
Shanghai 68
Lappeenranta 66
Guangzhou 64
Haiphong 64
Lomé 64
Padova 64
Jakarta 63
Shenyang 63
Phoenix 62
San Diego 60
Jinan 58
Brussels 56
Nuremberg 54
Florence 53
London 51
Zurich 51
Johannesburg 50
Tianjin 50
Istanbul 47
Redwood City 46
Saint Petersburg 46
Falls Church 45
Cesena 44
Norwalk 43
Vienna 43
Amsterdam 42
Taipei 41
Amman 39
Paris 39
Warsaw 39
Atlanta 37
Changsha 37
São Paulo 36
Falkenstein 35
Dearborn 33
Jacksonville 32
Orem 32
Shenzhen 32
Hangzhou 31
Hebei 31
Naples 31
Toronto 30
Des Moines 29
San Francisco 29
Nanchang 28
Washington 28
Zhengzhou 28
Fremont 27
Düsseldorf 26
Montreal 26
Totale 25.234
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Nome #
A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator with 0.22% INL 1.901
A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics 799
Enabling the Heterogeneous Accelerator Model on Ultra-Low Power Microcontroller Platforms 616
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC 474
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions 464
Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing 461
The Quest for Energy-Efficient I$ Design in Ultra-Low-Power Clustered Many-Cores 449
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS 413
A -1.8V to 0.9V body bias, 60 GOPS/W 4-core cluster in low-power 28nm UTBB FD-SOI technology 404
A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 μm BCD 403
A 60 GOPS/W, -1.8 v to 0.9 v body bias ULP cluster in 28 nm UTBB FD-SOI technology 363
A PULP-based Parallel Power Controller for Future Exascale Systems 355
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 350
Always-ON visual node with a hardware-software event-based binarized neural network inference engine 339
A mixed-precision RISC-V processor for extreme-edge DNN inference 336
PULP: A parallel ultra low power platform for next generation IoT applications 331
A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications 323
A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing 303
A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation 301
Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters 300
Logic-Base Interconnect Design for Near Memory Computing in the Smart Memory Cube 298
μDMA: An autonomous I/O subsystem for IoT end-nodes 295
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics 294
BioWolf: A Sub-10-mW 8-Channel Advanced Brain-Computer Interface Platform with a Nine-Core Processor and BLE Connectivity 294
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications 285
A sensor fusion approach for drowsiness detection in wearable ultra-low-power systems 285
A machine learning approach for automated wide-range frequency tagging analysis in embedded neuromonitoring systems 284
GAP-8: A RISC-V SoC for AI at the Edge of the IoT 283
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks 281
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors 281
Compressed sensing based seizure detection for an ultra low power multi-core architecture 277
Design and Evaluation of SmallFloat SIMD extensions to the RISC-V ISA 273
193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing 272
A Transprecision Floating-Point Architecture for Energy-Efficient Embedded Computing 265
An Event-Driven Ultra-Low-Power Smart Visual Sensor 263
Design and evaluation of a processing-in-memory architecture for the smart memory cube 259
Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs 259
A Fully Programmable eFPGA-Augmented SoC for Smart-Power Applications 255
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision 255
A Transprecision Floating-Point Platform for Ultra-Low Power Computing 251
A variation tolerant architecture for ultra low power multi-processor cluster 251
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing 250
Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices 250
Neurostream: Scalable and Energy Efficient Deep Learning with Smart Memory Cubes 249
Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor 248
PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters 248
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 248
Multicore Signal Processing Platform With Heterogeneous Configurable Hardware Accelerators 246
A Heterogeneous Digital Signal Processor for Dynamically Reconfigurable Computing 243
A Modular Shared L2 Memory Design for 3-D Integration 242
A 142MOPS/mW integrated programmable array accelerator for smart visual processing 242
CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration 240
An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes 240
The MORPHEUS Data Communication and Storage Infrastructure 239
Energy proportionality in near-threshold computing servers and cloud data centers: Consolidating or Not? 238
PULP-HD: Accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform 236
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 235
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster 233
A Multi-Core Signal Processor for Heterogeneous Reconfigurable Computing 232
A wearable EEG-based drowsiness detection system with blink duration and alpha waves analysis 232
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics 229
A Sub-mW IoT-Endnode for Always-On Visual Monitoring and Smart Triggering 228
Online Learning and Classification of EMG-Based Gestures on a Parallel Ultra-Low Power Platform Using Hyperdimensional Computing 227
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors 227
The Dream Digital Signal Processor: Architecture, programming model and application mapping 224
Enabling mixed-precision quantized neural networks in extreme-edge devices 224
Work-in-progress: Dory: Lightweight memory hierarchy management for deep NN inference on iot endnodes 222
A Heterogeneous Digital Signal Processor Implementation for Dynamically Reconfigurable Computing 221
Synergistic HW/SW Approximation Techniques for Ultralow-Power Parallel Computing 221
Energy efficient parallel computing on the PULP platform with support for OpenMP 217
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation flow for Near-Sensor Ultralow Power Processing 217
Flexible Software-Defined Packet Processing Using Low-Area Hardware 217
Flexible, scalable and energy efficient bio-signals processing on the PULP platform: A case study on seizure detection 216
Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures 215
A VHDL model and Implementation of a Coarse-Grain Reconfigurable Coprocessor for a RISC Core 214
RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip 214
Scalable EEG seizure detection on an ultra low power multi-core architecture 213
Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing 213
NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 213
Always-on motion detection with application-level error control on a near-threshold approximate computing platform 213
A coarse-grain reconfigurable architecture for multimedia applications supporting subword and floating-point calculations 212
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes 212
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors 210
Reducing Energy Consumption in Microcontroller-Based Platforms with Low Design Margin Co-Processors 203
A FPGA Implementation of An Open-Source Floating-Point Computation System 203
Modular Design and Optimization of Biomedical Applications for UltraLow Power Heterogeneous Platforms 202
Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology 200
Ultra-Low-Power Digital Architectures for the Internet of Things 199
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE 198
Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors 197
RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration 194
YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration 193
High Performance AXI-4.0 Based Interconnect for Extensible Smart Memory Cubes 191
End-To-end 100-TOPS/W Inference with Analog In-Memory Computing: Are We There Yet? 191
Hyperdrive: A Multi-Chip Systolically Scalable Binary-Weight CNN Inference Engine 188
Energy-efficient vision on the PULP platform for ultra-low power parallel computing 188
Always-On 674μW@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node 187
Energy-efficient design of an always-on smart visual trigger 186
Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology 186
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation 185
Totale 28.346
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Categoria #
all - tutte 92.711
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 92.711
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20226.829 0 144 781 678 908 661 723 717 794 294 659 470
2022/20233.023 344 436 183 335 178 258 104 149 501 91 284 160
2023/20241.320 86 153 78 87 127 170 141 74 70 192 70 72
2024/20255.114 209 582 423 347 620 316 448 230 136 604 317 882
2025/202612.788 820 1.275 1.511 758 1.273 666 1.583 481 2.139 943 717 622
2026/20271.218 591 627 0 0 0 0 0 0 0 0 0 0
Totale 39.187