ROSSI, DAVIDE
ROSSI, DAVIDE
DIPARTIMENTO DI INGEGNERIA DELL'ENERGIA ELETTRICA E DELL'INFORMAZIONE "GUGLIELMO MARCONI"
Docenti di ruolo di IIa fascia
A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation
2024 Valente, Luca; Nadalini, Alessandro; Veeran, Asif Hussain Chiralil; Sinigaglia, Mattia; Sá, Bruno; Wistoff, Nils; Tortorella, Yvan; Benatti, Simone; Psiakis, Rafail; Kulmala, Ari; Mohammad, Baker; Pinto, Sandro; Palossi, Daniele; Benini, Luca; Rossi, Davide
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine
2024 Prasad, Arpan Suravi; Scherer, Moritz; Conti, Francesco; Rossi, Davide; Di Mauro, Alfio; Eggimann, Manuel; Gómez, Jorge Tomás; Li, Ziyun; Sarwar, Syed Shakib; Wang, Zhao; De Salvo, Barbara; Benini, Luca
22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing
2023 Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, Georg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks
2023 Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation
2023 Ottaviano, Alessandro; Balas, Robert; Bambini, Giovanni; Del Vecchio, Antonio; Ciani, Maicol; Rossi, Davide; Benini, Luca; Bartolini, Andrea
CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration
2023 Sa, B; Valente, L; Martins, J; Rossi, D; Benini, L; Pinto, S
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case
2023 Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Alessandro Giusti; Davide Rossi; Daniele Palossi
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode
2023 Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays
2023 Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; Francesco Conti; Davide Rossi
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture
2023 Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini, Luca; Rossi, Davide
Energy Efficiency of Opportunistic Refreshing for Gain-Cell Embedded DRAM
2023 Frankel B.; Sarfati E.; Rossi D.; Wimer S.
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors
2023 Abadal S.; Guirado R.; Taghvaee H.; Jain A.; Santana E.P.D.; Bolivar P.H.; Saeed M.; Negra R.; Wang Z.; Wang K.; Lemme M.C.; Klein J.; Zapater M.; Levisse A.; Atienza D.; Rossi D.; Conti F.; Dazzi M.; Karunaratne G.; Boybat I.; Sebastian A.
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC
2023 Valente, Luca; Tortorella, Yvan; Sinigaglia, Mattia; Tagliavini, Giuseppe; Capotondi, Alessandro; Benini, Luca; Rossi, Davide
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space
2023 Michael Rogenmoser; Yvan Tortorella; Davide Rossi; Francesco Conti; Luca Benini
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing
2023 Francesco Conti; Gianna Paulin; Angelo Garofalo; Davide Rossi; Alfio Di Mauro; Georg Rutishauser; Gianmarco Ottavi; Manuel Eggimann; Hayate Okuhara; Luca Benini
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge
2023 Jain, Vikram; Cavalcante, Matheus; Bruschi, Nazareno; Rogenmoser, Michael; Benz, Thomas; Kurth, Andreas; Rossi, Davide; Benini, Luca; Verhelst, Marian
RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration
2023 Tortorella, Yvan; Bertaccini, Luca; Benini, Luca; Rossi, Davide; Conti, Francesco
Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters
2023 Chen J.; Loi I.; Flamand E.; Tagliavini G.; Benini L.; Rossi D.
Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs
2023 Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garofalo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D.
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS
2023 Scherer, M; Eggimann, M; Di Mauro, A; Prasad, AS; Conti, F; Rossi, D; Gómez, JT; Li, ZY; Sarwar, SS; Wang, Z; De Salvo, B; Benini, L
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
|---|---|---|---|---|---|---|
| A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation | Valente, Luca; Nadalini, Alessandro; Veeran, Asif Hussain Chiralil; Sinigaglia, Mattia; Sá, Bruno...; Wistoff, Nils; Tortorella, Yvan; Benatti, Simone; Psiakis, Rafail; Kulmala, Ari; Mohammad, Baker; Pinto, Sandro; Palossi, Daniele; Benini, Luca; Rossi, Davide | 2024-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | - |
| Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine | Prasad, Arpan Suravi; Scherer, Moritz; Conti, Francesco; Rossi, Davide; Di Mauro, Alfio; Eggimann..., Manuel; Gómez, Jorge Tomás; Li, Ziyun; Sarwar, Syed Shakib; Wang, Zhao; De Salvo, Barbara; Benini, Luca | 2024-01-01 | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - | 1.01 Articolo in rivista | Siracusa_JSSC_arxiv.pdf |
| 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing | Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, G...eorg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca | 2023-01-01 | - | - | 4.01 Contributo in Atti di convegno | - |
| A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks | Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | a 3 tops w risc post print .pdf |
| ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation | Ottaviano, Alessandro; Balas, Robert; Bambini, Giovanni; Del Vecchio, Antonio; Ciani, Maicol; Ros...si, Davide; Benini, Luca; Bartolini, Andrea | 2023-01-01 | INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING | - | 1.01 Articolo in rivista | ControlPULP A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation.pdf |
| CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration | Sa, B; Valente, L; Martins, J; Rossi, D; Benini, L; Pinto, S | 2023-01-01 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - | 1.01 Articolo in rivista | valente cva6 post print .pdf |
| Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case | Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Ales...sandro Giusti; Davide Rossi; Daniele Palossi | 2023-01-01 | IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS | IEEE | 4.01 Contributo in Atti di convegno | cyber security ciani post print.pdf |
| Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode | Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Ben...ini; Davide Rossi | 2023-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | 2201.08656.pdf |
| ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays | Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; F...rancesco Conti; Davide Rossi | 2023-01-01 | IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS | IEEE | 4.01 Contributo in Atti di convegno | - |
| End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture | Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini..., Luca; Rossi, Davide | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | IMA_RESNET_DATE_postprint.pdf |
| Energy Efficiency of Opportunistic Refreshing for Gain-Cell Embedded DRAM | Frankel B.; Sarfati E.; Rossi D.; Wimer S. | 2023-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | - |
| Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors | Abadal S.; Guirado R.; Taghvaee H.; Jain A.; Santana E.P.D.; Bolivar P.H.; Saeed M.; Negra R.; Wa...ng Z.; Wang K.; Lemme M.C.; Klein J.; Zapater M.; Levisse A.; Atienza D.; Rossi D.; Conti F.; Dazzi M.; Karunaratne G.; Boybat I.; Sebastian A. | 2023-01-01 | IEEE WIRELESS COMMUNICATIONS | - | 1.01 Articolo in rivista | Graphene_enabled_Wireless_Agile_Interconnects_for_Massive_Heterogeneous_Processor_Chips.pdf |
| HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC | Valente, Luca; Tortorella, Yvan; Sinigaglia, Mattia; Tagliavini, Giuseppe; Capotondi, Alessandro;... Benini, Luca; Rossi, Davide | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | HULK-V_a_Heterogeneous_Ultra-low-power_Linux_capable_RISC-V_SoC-accepted.pdf |
| Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space | Michael Rogenmoser; Yvan Tortorella; Davide Rossi; Francesco Conti; Luca Benini | 2023-01-01 | ACM TRANSACTIONS ON CYBER-PHYSICAL SYSTEMS | - | 1.01 Articolo in rivista | - |
| Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing | Francesco Conti; Gianna Paulin; Angelo Garofalo; Davide Rossi; Alfio Di Mauro; Georg Rutishauser;... Gianmarco Ottavi; Manuel Eggimann; Hayate Okuhara; Luca Benini | 2023-01-01 | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - | 1.01 Articolo in rivista | Binder3.pdf |
| PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge | Jain, Vikram; Cavalcante, Matheus; Bruschi, Nazareno; Rogenmoser, Michael; Benz, Thomas; Kurth, A...ndreas; Rossi, Davide; Benini, Luca; Verhelst, Marian | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | - |
| RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration | Tortorella, Yvan; Bertaccini, Luca; Benini, Luca; Rossi, Davide; Conti, Francesco | 2023-01-01 | FUTURE GENERATION COMPUTER SYSTEMS | - | 1.01 Articolo in rivista | mixed precision matrix postprint.pdf |
| Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters | Chen J.; Loi I.; Flamand E.; Tagliavini G.; Benini L.; Rossi D. | 2023-01-01 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - | 1.01 Articolo in rivista | scalable hierarchical instruction post print.pdf |
| Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs | Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garof...alo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D. | 2023-01-01 | - | - | 4.03 Poster | - |
| Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS | Scherer, M; Eggimann, M; Di Mauro, A; Prasad, AS; Conti, F; Rossi, D; Gómez, JT; Li, ZY; Sarwar, ...SS; Wang, Z; De Salvo, B; Benini, L | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | - |