Current ultra-low power smart sensing edge devices, operating for years on small batteries, are limited to low-bandwidth sensors, such as temperature or pressure. Enabling the next generation of edge devices to process data from richer sensors such as image, video, audio, or multi-axial motion/vibration has huge application potential. However, edge processing of data-rich sensors poses the extreme challenge of squeezing the computational requirements of advanced, machine-Iearning-based near-sensor data analysis algorithms (such as Convolutional Neural Networks) within the mW-range power envelope of always-ON battery-powered IoT end-nodes. To address this challenge, we propose GAP-8: a multi-GOPS fully programmable RISC-V IoT-edge computing engine, featuring a 8-core cluster with CNN accelerator, coupled with an ultra-low power MCU with 30 μW state-retentive sleep power. GAP-8 delivers up to 10 GMAC/s for CNN inference (90 MHz, 1.0V) at the energy efficiency of 600 GMAC/s/W within a worst-case power envelope of75 mW.

E. Flamand, D. Rossi, F. Conti, I. Loi, A. Pullini, F. Rotenberg, et al. (2018). GAP-8: A RISC-V SoC for AI at the Edge of the IoT [10.1109/ASAP.2018.8445101].

GAP-8: A RISC-V SoC for AI at the Edge of the IoT

D. Rossi;F. Conti;I. Loi;L. Benini
2018

Abstract

Current ultra-low power smart sensing edge devices, operating for years on small batteries, are limited to low-bandwidth sensors, such as temperature or pressure. Enabling the next generation of edge devices to process data from richer sensors such as image, video, audio, or multi-axial motion/vibration has huge application potential. However, edge processing of data-rich sensors poses the extreme challenge of squeezing the computational requirements of advanced, machine-Iearning-based near-sensor data analysis algorithms (such as Convolutional Neural Networks) within the mW-range power envelope of always-ON battery-powered IoT end-nodes. To address this challenge, we propose GAP-8: a multi-GOPS fully programmable RISC-V IoT-edge computing engine, featuring a 8-core cluster with CNN accelerator, coupled with an ultra-low power MCU with 30 μW state-retentive sleep power. GAP-8 delivers up to 10 GMAC/s for CNN inference (90 MHz, 1.0V) at the energy efficiency of 600 GMAC/s/W within a worst-case power envelope of75 mW.
2018
2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
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E. Flamand, D. Rossi, F. Conti, I. Loi, A. Pullini, F. Rotenberg, et al. (2018). GAP-8: A RISC-V SoC for AI at the Edge of the IoT [10.1109/ASAP.2018.8445101].
E. Flamand; D. Rossi; F. Conti; I. Loi; A. Pullini; F. Rotenberg; L. Benini
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/652928
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