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ItalianoBENINI, LUCA
Dettaglio
BENINI, LUCA
DIPARTIMENTO DI INGEGNERIA DELL'ENERGIA ELETTRICA E DELL'INFORMAZIONE "GUGLIELMO MARCONI"
Docenti di ruolo di Ia fascia
BENINI L; L. BENINI; Luca Benini
Pubblicazioni
Risultati 1 - 20 di 943 (tempo di esecuzione: 0.001 secondi).
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File | |
|---|---|---|---|---|---|---|---|
| 1 | 0, 1, 2, many - A classroom occupancy monitoring system for smart public buildings | Paci, Francesco; Brunelli, Davide; Benini, Luca | 2014 | 4.01 Contributo in Atti di convegno | - | ||
| 2 | A 0.45-0.7 v 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation | Choi, Woo-Seok*; Shu, Guanghua; Talegaonkar, Mrunmay; Liu, Yubo; Wei, Da; Benini, Luca; Hanumolu,... Pavan Kumar | 2018 | IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1.01 Articolo in rivista | - | |
| 3 | A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS | Choi, Woo-Seok; Shu, Guanghua; Talegaonkar, Mrunmay; Liu, Yubo; Wei, Da; Benini, Luca; Hanumolu, ...Pavan Kumar | 2015 | DIGEST OF TECHNICAL PAPERS - IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
| 4 | A 0.80pJ/flop, 1.24Tflop/sW 8-to-64 bit Transprecision Floating-Point Unit for a 64 bit RISC-V Processor in 22nm FD-SOI | Mach S.; Schuiki F.; Zaruba F.; Benini L. | 2019 | IEEE Computer Society | 4.01 Contributo in Atti di convegno | ||
| 5 | A -1.8V to 0.9V body bias, 60 GOPS/W 4-core cluster in low-power 28nm UTBB FD-SOI technology | Rossi, Davide; Pullini, Antonio; Gautschi, Michael; Loi, Igor; Gurkaynak, Frank Kagan; Flatresse,... Philippe; Benini, Luca | 2015 | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | ||
| 6 | A 142MOPS/mW integrated programmable array accelerator for smart visual processing | Das, Satyajit; Rossi, Davide; Martin Kevin, J. M.; Coussy, Philippe; Benini, Luca | 2017 | IEEE | 4.01 Contributo in Atti di convegno | - | |
| 7 | 16 Gb/s Microring-to-Microring Photonic Link in 45 nm Monolithic Zero-Change CMOS | Marco Eppenberger; Arne Josten; Juerg Leuthold; Benedikt Bäuerle; Luca Alloatti; Luca Benini; Dav...id Moor | 2018 | 4.01 Contributo in Atti di convegno | - | ||
| 8 | 193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing | Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gurkaynak, Frank Kagan; Teman, Ada...m; Constantin, Jeremy; Burg, Andreas; Miro-Panades, Ivan; Beign, Edith; Clermidy, Fabien; Abouzeid, Fady; Flatresse, Philippe; Benini, Luca | 2016 | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - | |
| 9 | A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 μm BCD | Crescentini, M.; Biondi, M.; Bennati, M.; Alberti, P.; Luciani, G.; Tamburini, C.; Pizzotti, M.; ...Romani, A.; Tartagni, M.; Bellasi, D.; Rossi, D.; Benini, L.; Marchesi, M.; Cristaudo, D.; Canegallo, R. | 2016 | IEEE | 4.01 Contributo in Atti di convegno | - | |
| 10 | A 2.2-μ W Cognitive Always-On Wake-Up Circuit for Event-Driven Duty-Cycling of IoT Sensor Nodes | Rovere, Giovanni*; Fateh, Schekeb; Benini, Luca | 2018 | IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | 1.01 Articolo in rivista | ||
| 11 | A 2.4 GHz-868 MHz dual-band wake-up radio for wireless sensor network and IoT | Del Prete, Massimo; Masotti, Diego; Costanzo, Alessandra; Magno, Michele; Benini, Luca | 2015 | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - | |
| 12 | 3D CV descriptor on parallel heterogeneous platforms | Palossi, Daniele; Ruggiero, Martino; Benini, Luca | 2015 | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | 1.01 Articolo in rivista | - | |
| 13 | 3D logarithmic interconnect: Stacking multiple L1 memory dies over multi-core clusters2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS) | Erfan Azarkhish;Igor Loi;Luca Benini | 2013 | IEEE | 4.01 Contributo in Atti di convegno | - | |
| 14 | 3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks | C. Seiculescu; S. Murali; L. Benini; G. De Micheli | 2011 | Springer | 2.01 Capitolo / saggio in libro | - | |
| 15 | 3D NoCs — Unifying inter & intra chip communication | Loi I. ; Marchal P. ; Pullini A. ; Benini L. | 2010 | IEEE Press | 4.01 Contributo in Atti di convegno | - | |
| 16 | 3D-LIN: A Configurable Low-Latency Interconnect for Multi-Core Clusters with 3D Stacked L1 Memory | G. Beanato; I. Loi; G. De Micheli; Y. Leblebici; L. Benini | 2012 | IEEE Press | 4.01 Contributo in Atti di convegno | - | |
| 17 | 3dID: a low-power, low-cost hand motion capture device | M. Sama; V. Pacella; E. Farella; L. Benini; B. Riccó | 2006 | European Design and Automation Association | 4.01 Contributo in Atti di convegno | - | |
| 18 | 4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster | Gautschi, Michael; Schaffner, Michael; Gurkaynak, Frank K.; Benini, Luca | 2016 | DIGEST OF TECHNICAL PAPERS - IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
| 19 | A 60 GOPS/W, -1.8 v to 0.9 v body bias ULP cluster in 28 nm UTBB FD-SOI technology | Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gürkaynak, Frank K.; Bartolini, An...drea; Flatresse, Philippe; Benini, Luca | 2016 | SOLID-STATE ELECTRONICS | 1.01 Articolo in rivista | - | |
| 20 | A 64mW DNN-based Visual Navigation Engine for Autonomous Nano-Drones | Palossi, Daniele; Loquercio, Antonio; Conti, Francesco; Flamand, Eric; Scaramuzza, Davide; Benini..., Luca | 2019 | IEEE INTERNET OF THINGS JOURNAL | 1.01 Articolo in rivista | - |
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