This paper proposes a reconfigurable System-on-Chip (SoC) for Smart-Power applications. The system is composed of an ultra-low-power microcontroller for standard software programmability, coupled to an embedded-FPGA (eFPGA) to perform control-driven applications, featuring digital elaboration with small computational load, at a lower power consumption and higher responsiveness compared to processor-based implementation. Added value of the proposed system is that the whole digital system is synthesizable, since also the eFPGA is based on a soft-core approach. In the paper we discuss the application domain and present the results of integrating an eFPGA with a computational capability of ≈1K equivalent gates in the STMicroelectronics 0.13 μm Bipolar, CMOS, DMOS (BCD) Smart-Power technology featuring only four metal layers. As expected, eFPGA integration in the SoCs introduces a significant area-overhead (about 20÷25% ), but has a straightforward benefit in terms of energy consumption reduction compared to processor-based implementations. On average, based on our analysis, the energy gain achievable in this scenario can be quantified in a couple of orders of magnitude.

A Fully Programmable eFPGA-Augmented SoC for Smart-Power Applications / Renzini, F.; Rossi, D.; Franchi Scarselli, E; Mucci, C.; Canegallo, R.. - ELETTRONICO. - CFP18773-ART:(2018), pp. 241-244. (Intervento presentato al convegno 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) tenutosi a Bordeaux, France nel 9-12 Dec. 2018) [10.1109/ICECS.2018.8617970].

A Fully Programmable eFPGA-Augmented SoC for Smart-Power Applications

Renzini, F.;Rossi, D.;Franchi Scarselli, E;
2018

Abstract

This paper proposes a reconfigurable System-on-Chip (SoC) for Smart-Power applications. The system is composed of an ultra-low-power microcontroller for standard software programmability, coupled to an embedded-FPGA (eFPGA) to perform control-driven applications, featuring digital elaboration with small computational load, at a lower power consumption and higher responsiveness compared to processor-based implementation. Added value of the proposed system is that the whole digital system is synthesizable, since also the eFPGA is based on a soft-core approach. In the paper we discuss the application domain and present the results of integrating an eFPGA with a computational capability of ≈1K equivalent gates in the STMicroelectronics 0.13 μm Bipolar, CMOS, DMOS (BCD) Smart-Power technology featuring only four metal layers. As expected, eFPGA integration in the SoCs introduces a significant area-overhead (about 20÷25% ), but has a straightforward benefit in terms of energy consumption reduction compared to processor-based implementations. On average, based on our analysis, the energy gain achievable in this scenario can be quantified in a couple of orders of magnitude.
2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 2018 : Bordeaux, 9-12 December 2018
241
244
A Fully Programmable eFPGA-Augmented SoC for Smart-Power Applications / Renzini, F.; Rossi, D.; Franchi Scarselli, E; Mucci, C.; Canegallo, R.. - ELETTRONICO. - CFP18773-ART:(2018), pp. 241-244. (Intervento presentato al convegno 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) tenutosi a Bordeaux, France nel 9-12 Dec. 2018) [10.1109/ICECS.2018.8617970].
Renzini, F.; Rossi, D.; Franchi Scarselli, E; Mucci, C.; Canegallo, R.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/663403
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