Computing with high-dimensional (HD) vectors, also referred to as hypervectors, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on hypervectors, generality, scalability, robustness, fast learning, and ubiquitous parallel operations. HD computing is about manipulating and comparing large patterns-binary hypervectors with 10,000 dimensions-making its efficient realization on minimalistic ultra-low-power platforms challenging. This paper describes HD computing's acceleration and its optimization of memory accesses and operations on a silicon prototype of the PULPv3 4-core platform (1.5mm2, 2 mW), surpassing the stateof-the-art classification accuracy (on average 92.4%) with simultaneous 3.7× end-to-end speed-up and 2× energy saving compared to its single-core execution. We further explore the scalability of our accelerator by increasing the number of inputs and classification window on a new generation of the PULP architecture featuring bitmanipulation instruction extensions and larger number of 8 cores. These together enable a near ideal speed-up of 18.4× compared to the single-core PULPv3.

PULP-HD: Accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform / Fabio Montagna, Abbas Rahimi, Simone Benatti, Davide Rossi, Luca Benini. - ELETTRONICO. - (2018), pp. 58.3.1-58.3.6. (Intervento presentato al convegno 55th Annual Design Automation Conference, DAC 2018 tenutosi a San Francisco, CA - USA nel JUN 24-28, 2018) [10.1145/3195970.3196096].

PULP-HD: Accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform

Fabio Montagna;Simone Benatti;Davide Rossi;Luca Benini
2018

Abstract

Computing with high-dimensional (HD) vectors, also referred to as hypervectors, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on hypervectors, generality, scalability, robustness, fast learning, and ubiquitous parallel operations. HD computing is about manipulating and comparing large patterns-binary hypervectors with 10,000 dimensions-making its efficient realization on minimalistic ultra-low-power platforms challenging. This paper describes HD computing's acceleration and its optimization of memory accesses and operations on a silicon prototype of the PULPv3 4-core platform (1.5mm2, 2 mW), surpassing the stateof-the-art classification accuracy (on average 92.4%) with simultaneous 3.7× end-to-end speed-up and 2× energy saving compared to its single-core execution. We further explore the scalability of our accelerator by increasing the number of inputs and classification window on a new generation of the PULP architecture featuring bitmanipulation instruction extensions and larger number of 8 cores. These together enable a near ideal speed-up of 18.4× compared to the single-core PULPv3.
2018
PROCEEDINGS OF THE 2018 55TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)
1
6
PULP-HD: Accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform / Fabio Montagna, Abbas Rahimi, Simone Benatti, Davide Rossi, Luca Benini. - ELETTRONICO. - (2018), pp. 58.3.1-58.3.6. (Intervento presentato al convegno 55th Annual Design Automation Conference, DAC 2018 tenutosi a San Francisco, CA - USA nel JUN 24-28, 2018) [10.1145/3195970.3196096].
Fabio Montagna, Abbas Rahimi, Simone Benatti, Davide Rossi, Luca Benini
File in questo prodotto:
File Dimensione Formato  
DAC_pap.pdf

Open Access dal 21/03/2019

Tipo: Postprint
Licenza: Licenza per accesso libero gratuito
Dimensione 1.06 MB
Formato Adobe PDF
1.06 MB Adobe PDF Visualizza/Apri

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/647800
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 40
  • ???jsp.display-item.citation.isi??? 37
social impact