In recent years, Coarse Grain Reconfigurable Architecture (CGRA) accelerators have been increasingly deployed in Internet-of-Things (IoT) end nodes. A modern CGRA has to support and efficiently accelerate both integer and floating-point (FP) operations. In this paper, we propose an ultra-low-power tunable-precision CGRA architectural template, called TRANSprecision floating-point Programmable archItectuRE (TRANSPIRE), and its associated compilation flow supporting both integer and FP operations. TRANSPIRE employs transprecision computing and multiple Single Instruction Multiple Data (SIMD) to accelerate FP operations while boosting energy efficiency as well. Experimental results show that TRANSPIRE achieves a maximum of 10.06× performance gain and consumes 12.91× less energy w.r.t. a RISC-V based CPU with an enhanced ISA supporting SIMD-style vectorization and FP data-types, while executing applications for near-sensor computing and embedded machine learning, with an area overhead of 1.25× only

Prasad, R., Das, S., Martin, K.J.M., Tagliavini, G., Coussy, P., Benini, L., et al. (2020). TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE. Institute of Electrical and Electronics Engineers Inc. (IEEE) [10.23919/DATE48585.2020.9116408].

TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE

Prasad, Rohit;Das, Satyajit;Tagliavini, Giuseppe;Benini, Luca;Rossi, Davide
2020

Abstract

In recent years, Coarse Grain Reconfigurable Architecture (CGRA) accelerators have been increasingly deployed in Internet-of-Things (IoT) end nodes. A modern CGRA has to support and efficiently accelerate both integer and floating-point (FP) operations. In this paper, we propose an ultra-low-power tunable-precision CGRA architectural template, called TRANSprecision floating-point Programmable archItectuRE (TRANSPIRE), and its associated compilation flow supporting both integer and FP operations. TRANSPIRE employs transprecision computing and multiple Single Instruction Multiple Data (SIMD) to accelerate FP operations while boosting energy efficiency as well. Experimental results show that TRANSPIRE achieves a maximum of 10.06× performance gain and consumes 12.91× less energy w.r.t. a RISC-V based CPU with an enhanced ISA supporting SIMD-style vectorization and FP data-types, while executing applications for near-sensor computing and embedded machine learning, with an area overhead of 1.25× only
2020
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
1067
1072
Prasad, R., Das, S., Martin, K.J.M., Tagliavini, G., Coussy, P., Benini, L., et al. (2020). TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE. Institute of Electrical and Electronics Engineers Inc. (IEEE) [10.23919/DATE48585.2020.9116408].
Prasad, Rohit; Das, Satyajit; Martin, Kevin J. M.; Tagliavini, Giuseppe; Coussy, Philippe; Benini, Luca; Rossi, Davide
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/763661
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