Wide-bandwidth lossless current sensors are critical in numerous applications, from current monitoring in DC-DC converters to non-invasive load monitoring. CMOS Hall sensor is a low-cost solution for current sensing and can be easily integrated as part of mixed-signal system-on-chips (SoCs). State-of-the-art CMOS Hall sensors offer only limited acquisition bandwidths of a few hundred kHz. This paper presents a 1 MHz Hall current sensor SoC integrating a broadband CMOS Hall sensor, two 2 MS/s ADCs and a multi-mode digital compressive sensing encoder for data rate reduction. The complete SoC is implemented in a STM 0.16 μm BCD technology, and occupies 16 mm2 while consuming less than 94 mW at 1.8 V.
A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 μm BCD / Crescentini, M.; Biondi, M.; Bennati, M.; Alberti, P.; Luciani, G.; Tamburini, C.; Pizzotti, M.; Romani, A.; Tartagni, M.; Bellasi, D.; Rossi, D.; Benini, L.; Marchesi, M.; Cristaudo, D.; Canegallo, R.. - ELETTRONICO. - 2016-:(2016), pp. 7598324.393-7598324.396. (Intervento presentato al convegno 42nd European Solid-State Circuits Conference, ESSCIRC 2016 tenutosi a Lausanne nel 2016) [10.1109/ESSCIRC.2016.7598324].
A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 μm BCD
CRESCENTINI, MARCO;BIONDI, MICHELE;BENNATI, MARCO;ALBERTI, PAOLO;LUCIANI, GIULIA;TAMBURINI, CINZIA;PIZZOTTI, MATTEO;ROMANI, ALDO;TARTAGNI, MARCO;ROSSI, DAVIDE;BENINI, LUCA;
2016
Abstract
Wide-bandwidth lossless current sensors are critical in numerous applications, from current monitoring in DC-DC converters to non-invasive load monitoring. CMOS Hall sensor is a low-cost solution for current sensing and can be easily integrated as part of mixed-signal system-on-chips (SoCs). State-of-the-art CMOS Hall sensors offer only limited acquisition bandwidths of a few hundred kHz. This paper presents a 1 MHz Hall current sensor SoC integrating a broadband CMOS Hall sensor, two 2 MS/s ADCs and a multi-mode digital compressive sensing encoder for data rate reduction. The complete SoC is implemented in a STM 0.16 μm BCD technology, and occupies 16 mm2 while consuming less than 94 mW at 1.8 V.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
