As technology edges closer to fundamental limits, variations of process parameters, operational voltage, and temperature (PVT variations) have to be accounted for. This paper proposes to make higher levels aware of these variations and bring them under system control by using software controlled body biasing. PVT variations can thus be exploited to reduce power and energy consumption.

Rossi, D., Loi, I., Pullini, A., Muller, C., Burg, A., Conti, F., et al. (2017). A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors. IEEE DESIGN & TEST, 34(6), 46-53 [10.1109/MDAT.2017.2750907].

A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors

Rossi, Davide;Loi, Igor;Pullini, Antonio;Conti, Francesco;Benini, Luca;
2017

Abstract

As technology edges closer to fundamental limits, variations of process parameters, operational voltage, and temperature (PVT variations) have to be accounted for. This paper proposes to make higher levels aware of these variations and bring them under system control by using software controlled body biasing. PVT variations can thus be exploited to reduce power and energy consumption.
2017
Rossi, D., Loi, I., Pullini, A., Muller, C., Burg, A., Conti, F., et al. (2017). A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors. IEEE DESIGN & TEST, 34(6), 46-53 [10.1109/MDAT.2017.2750907].
Rossi, Davide; Loi, Igor; Pullini, Antonio; Muller, Christoph; Burg, Andreas; Conti, Francesco; Benini, Luca; Flatresse, Philippe
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/613495
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