PULLINI, ANTONIO
PULLINI, ANTONIO
DIP. DI ELETTRONICA,INFORMATICA,SISTEMISTICA-DEIS
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode
2021 Rossi D.; Conti F.; Eggiman M.; Mach S.; Mauro A.D.; Guermandi M.; Tagliavini G.; Pullini A.; Loi I.; Chen J.; Flamand E.; Benini L.
A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing
2018 Pullini, Antonio; Conti, Francesco; Rossi, Davide; Loi, Igor; Gautschi, Michael; Benini, Luca
An energy efficient E-skin embedded system for real-time tactile data decoding
2018 Magno, Michele*; Ibrahim, Ali; Pullini, Antonio; Valle, Maurizio; Benini, Luca
Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology
2018 Di Mauro, Alfio; Rossi, Davide; Pullini, Antonio; Flatresse, Philippe; Benini, Luca
Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing
2018 Pullini, Antonio; Rossi, Davide; Loi, Igor; Di Mauro, Alfio; Benini, Luca
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors
2017 Rossi, Davide; Loi, Igor; Pullini, Antonio; Muller, Christoph; Burg, Andreas; Conti, Francesco; Benini, Luca; Flatresse, Philippe
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics
2017 Conti, Francesco; Schilling, Robert; Schiavone, Pasquale Davide; Pullini, Antonio; Rossi, Davide; Gurkaynak, Frank Kagan; Muehlberghuber, Michael; Gautschi, Michael; Loi, Igor; Haugou, Germain; Mangard, Stefan; Benini, Luca
Energy efficient system for tactile data decoding using an ultra-low power parallel platform
2017 Magno, Michele; Ibrahim, Ali; Pullini, Antonio; Valle, Maurizio; Benini, Luca
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster
2017 Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gurkaynak, Frank Kagan; Teman, Adam; Constantin, Jeremy; Burg, Andreas; Miro-Panades, Ivan; Beigne, Edith; Clermidy, Fabien; Flatresse, Philippe; Benini, Luca
Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices
2017 Gautschi, Michael; Schiavone, Pasquale Davide; Traber, Andreas; Loi, Igor; Pullini, Antonio; Rossi, Davide; Flamand, Eric; Gurkaynak, Frank K.; Benini, Luca
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications
2017 Davide Schiavone, Pasquale; Conti, Francesco; Rossi, Davide; Gautschi, Michael; Pullini, Antonio; Flamand, Eric; Benini, Luca
Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology
2017 Di Mauro, Alfio; Rossi, Davide; Pullini, Antonio; Flatresse, Philippe; Benini, Luca
Ultra-Low-Power Digital Architectures for the Internet of Things
2017 Rossi, Davide; Loi, Igor; Pullini, Antonio; Benini, Luca
μDMA: An autonomous I/O subsystem for IoT end-nodes
2017 Pullini, Antonio; Rossi, Davide; Haugou, Germain; Benini, Luca
PULP: A parallel ultra low power platform for next generation IoT applications
2016 Rossi, Davide; Conti, Francesco; Marongiu, Andrea; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Tagliavini, Giuseppe; Capotondi, Alessandro; Flatresse, Philippe; Benini, Luca
Exploring architectural heterogeneity in intelligent vision systems
2015 Chandramoorthy, N.; Tagliavini, G.; Irick, K.; Pullini, A.; Advani, S.; Habsi, S.A.; Cotter, M.; Sampson, J.; Narayanan, V.; Benini, L.
Brain-inspired classroom occupancy monitoring on a low-power mobile platform
2014 Conti, Francesco; Pullini, Antonio; Benini, Luca
Energy efficient parallel computing on the PULP platform with support for OpenMP
2014 Rossi, Davide; Loi, Igor; Conti, Francesco.; Tagliavini, Giuseppe; Pullini, Antonio.; Marongiu, Andrea
Row-based FBB: A design-time optimization for post-silicon tunable circuits
2012 M. R. Kakoee; A. Sathanur; A. Pullini; L. Benini
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology
2011 Van der Plas G.; Limaye P.; Loi I.; Mercha A.; Oprins H.; Torregiani C.; Thijs S.; Linten D.; Stucchi M.; Katti G.; Velenis D.; Cherman V.; Vandevelde B.; Simons V.; De Wolf I.; Labie R.; Perry D.; Bronckers S.; Minas N.; Cupac M.; Ruythooren W.; Van Olmen J.; Phommahaxay A.; de Potter de ten Broeck M.; Opdebeeck A.; Rakowski M.; De Wachter B.; Dehan M.; Nelis M.; Agarwal R.; Pullini A.; Angiolini F.; Benini L.; Dehaene W.; Travaly Y.; Beyne E.; Marchal P.
Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
---|---|---|---|---|---|---|
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode | Rossi D.; Conti F.; Eggiman M.; Mach S.; Mauro A.D.; Guermandi M.; Tagliavini G.; Pullini A.; Loi... I.; Chen J.; Flamand E.; Benini L. | 2021-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | 09365939.pdf; paper_proofread_d.pdf |
A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing | Pullini, Antonio; Conti, Francesco; Rossi, Davide; Loi, Igor; Gautschi, Michael; Benini, Luca | 2018-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS | - | 1.01 Articolo in rivista | tcas2_resubmit_v5_disclaimer.pdf |
An energy efficient E-skin embedded system for real-time tactile data decoding | Magno, Michele*; Ibrahim, Ali; Pullini, Antonio; Valle, Maurizio; Benini, Luca | 2018-01-01 | JOURNAL OF LOW POWER ELECTRONICS | - | 1.01 Articolo in rivista | - |
Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology | Di Mauro, Alfio; Rossi, Davide; Pullini, Antonio; Flatresse, Philippe; Benini, Luca | 2018-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing | Pullini, Antonio; Rossi, Davide; Loi, Igor; Di Mauro, Alfio; Benini, Luca | 2018-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors | Rossi, Davide; Loi, Igor; Pullini, Antonio; Muller, Christoph; Burg, Andreas; Conti, Francesco; B...enini, Luca; Flatresse, Philippe | 2017-01-01 | IEEE DESIGN & TEST | - | 1.01 Articolo in rivista | - |
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics | Conti, Francesco; Schilling, Robert; Schiavone, Pasquale Davide; Pullini, Antonio; Rossi, Davide;... Gurkaynak, Frank Kagan; Muehlberghuber, Michael; Gautschi, Michael; Loi, Igor; Haugou, Germain; Mangard, Stefan; Benini, Luca | 2017-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | Conti_et_al_2017_postprint.pdf |
Energy efficient system for tactile data decoding using an ultra-low power parallel platform | Magno, Michele; Ibrahim, Ali; Pullini, Antonio; Valle, Maurizio; Benini, Luca | 2017-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster | Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gurkaynak, Frank Kagan; Teman, Ada...m; Constantin, Jeremy; Burg, Andreas; Miro-Panades, Ivan; Beigne, Edith; Clermidy, Fabien; Flatresse, Philippe; Benini, Luca | 2017-01-01 | IEEE MICRO | - | 1.01 Articolo in rivista | - |
Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices | Gautschi, Michael; Schiavone, Pasquale Davide; Traber, Andreas; Loi, Igor; Pullini, Antonio; Ross...i, Davide; Flamand, Eric; Gurkaynak, Frank K.; Benini, Luca | 2017-01-01 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - | 1.01 Articolo in rivista | GAUTSCHI_TVLSI_2017_disclaimer.pdf |
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications | Davide Schiavone, Pasquale; Conti, Francesco; Rossi, Davide; Gautschi, Michael; Pullini, Antonio;... Flamand, Eric; Benini, Luca | 2017-01-01 | - | - | 4.01 Contributo in Atti di convegno | - |
Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology | Di Mauro, Alfio; Rossi, Davide; Pullini, Antonio; Flatresse, Philippe; Benini, Luca | 2017-01-01 | - | - | 4.01 Contributo in Atti di convegno | Temperature_and_Process_fulltext.pdf |
Ultra-Low-Power Digital Architectures for the Internet of Things | Rossi, Davide; Loi, Igor; Pullini, Antonio; Benini, Luca | 2017-01-01 | - | Springer International Publishing | 2.01 Capitolo / saggio in libro | - |
μDMA: An autonomous I/O subsystem for IoT end-nodes | Pullini, Antonio; Rossi, Davide; Haugou, Germain; Benini, Luca | 2017-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
PULP: A parallel ultra low power platform for next generation IoT applications | Rossi, Davide; Conti, Francesco; Marongiu, Andrea; Pullini, Antonio; Loi, Igor; Gautschi, Michael...; Tagliavini, Giuseppe; Capotondi, Alessandro; Flatresse, Philippe; Benini, Luca | 2016-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
Exploring architectural heterogeneity in intelligent vision systems | Chandramoorthy, N.; Tagliavini, G.; Irick, K.; Pullini, A.; Advani, S.; Habsi, S.A.; Cotter, M.; ...Sampson, J.; Narayanan, V.; Benini, L. | 2015-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | - |
Brain-inspired classroom occupancy monitoring on a low-power mobile platform | Conti, Francesco; Pullini, Antonio; Benini, Luca | 2014-01-01 | IEEE COMPUTER SOCIETY CONFERENCE ON COMPUTER VISION AND PATTERN RECOGNITION WORKSHOPS | IEEE Computer Society | 4.01 Contributo in Atti di convegno | - |
Energy efficient parallel computing on the PULP platform with support for OpenMP | Rossi, Davide; Loi, Igor; Conti, Francesco.; Tagliavini, Giuseppe; Pullini, Antonio.; Marongiu, A...ndrea | 2014-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | - |
Row-based FBB: A design-time optimization for post-silicon tunable circuits | M. R. Kakoee; A. Sathanur; A. Pullini; L. Benini | 2012-01-01 | MICROELECTRONICS JOURNAL | - | 1.01 Articolo in rivista | - |
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology | Van der Plas G.; Limaye P.; Loi I.; Mercha A.; Oprins H.; Torregiani C.; Thijs S.; Linten D.; Stu...cchi M.; Katti G.; Velenis D.; Cherman V.; Vandevelde B.; Simons V.; De Wolf I.; Labie R.; Perry D.; Bronckers S.; Minas N.; Cupac M.; Ruythooren W.; Van Olmen J.; Phommahaxay A.; de Potter de ten Broeck M.; Opdebeeck A.; Rakowski M.; De Wachter B.; Dehan M.; Nelis M.; Agarwal R.; Pullini A.; Angiolini F.; Benini L.; Dehaene W.; Travaly Y.; Beyne E.; Marchal P. | 2011-01-01 | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - | 1.01 Articolo in rivista | - |