CRIS Current Research Information System

CONTI, FRANCESCO
 Distribuzione geografica
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Continente #
NA - Nord America 7.880
AS - Asia 6.955
EU - Europa 5.075
SA - Sud America 378
AF - Africa 333
OC - Oceania 19
Continente sconosciuto - Info sul continente non disponibili 3
Totale 20.643
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Nazione #
US - Stati Uniti d'America 7.609
IT - Italia 1.792
CN - Cina 1.760
SG - Singapore 1.739
VN - Vietnam 1.346
DE - Germania 715
GB - Regno Unito 706
HK - Hong Kong 653
BD - Bangladesh 326
FR - Francia 323
IN - India 293
BR - Brasile 284
SE - Svezia 282
KR - Corea 245
NL - Olanda 242
CA - Canada 216
FI - Finlandia 165
RU - Federazione Russa 143
IE - Irlanda 134
JP - Giappone 130
CI - Costa d'Avorio 114
ES - Italia 106
CH - Svizzera 96
ZA - Sudafrica 84
TW - Taiwan 69
BG - Bulgaria 67
PH - Filippine 66
ID - Indonesia 61
SC - Seychelles 58
AT - Austria 48
TR - Turchia 45
UA - Ucraina 45
PL - Polonia 39
AR - Argentina 38
BE - Belgio 35
TH - Thailandia 34
EE - Estonia 29
GR - Grecia 29
IQ - Iraq 28
JO - Giordania 27
MX - Messico 26
MY - Malesia 25
TG - Togo 21
AU - Australia 17
PK - Pakistan 17
IL - Israele 16
RO - Romania 16
EC - Ecuador 13
CL - Cile 12
DK - Danimarca 11
IR - Iran 11
SA - Arabia Saudita 11
DZ - Algeria 10
UZ - Uzbekistan 10
LB - Libano 9
LT - Lituania 9
CO - Colombia 8
CR - Costa Rica 8
HR - Croazia 8
ET - Etiopia 7
KE - Kenya 7
MA - Marocco 7
PE - Perù 7
AE - Emirati Arabi Uniti 6
EG - Egitto 6
GH - Ghana 6
LU - Lussemburgo 6
PY - Paraguay 6
DO - Repubblica Dominicana 5
NO - Norvegia 5
NP - Nepal 5
OM - Oman 5
VE - Venezuela 5
AZ - Azerbaigian 4
CZ - Repubblica Ceca 4
GT - Guatemala 4
LV - Lettonia 4
SK - Slovacchia (Repubblica Slovacca) 4
TN - Tunisia 4
BO - Bolivia 3
BY - Bielorussia 3
HN - Honduras 3
NG - Nigeria 3
SI - Slovenia 3
A2 - ???statistics.table.value.countryCode.A2??? 2
BB - Barbados 2
HU - Ungheria 2
KW - Kuwait 2
KZ - Kazakistan 2
LA - Repubblica Popolare Democratica del Laos 2
MD - Moldavia 2
MN - Mongolia 2
NZ - Nuova Zelanda 2
SV - El Salvador 2
TT - Trinidad e Tobago 2
UY - Uruguay 2
BA - Bosnia-Erzegovina 1
CG - Congo 1
CU - Cuba 1
CY - Cipro 1
Totale 20.629
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Città #
Ann Arbor 1.797
Singapore 1.202
Ashburn 635
Hong Kong 594
Southend 488
Hefei 438
Chandler 419
San Jose 407
Bologna 390
Fairfield 357
Santa Clara 346
Ho Chi Minh City 318
Hanoi 283
Munich 259
Seoul 202
Wilmington 184
Los Angeles 178
Woodbridge 177
Beijing 164
Seattle 153
New York 150
Dublin 134
Princeton 133
Houston 132
Montréal 123
Cambridge 118
Dallas 117
Milan 117
Boardman 115
Turin 115
Abidjan 114
Helsinki 114
Mcallen 103
Lauterbourg 89
Tokyo 86
Rome 79
Council Bluffs 77
Buffalo 73
Sofia 66
Frankfurt am Main 53
Dong Ket 51
Berlin 50
Da Nang 50
Haiphong 50
Guangzhou 49
Medford 48
Redmond 48
Chicago 47
Nanjing 47
Bengaluru 46
Johannesburg 44
Westminster 41
Jakarta 37
Redondo Beach 36
Zurich 35
Florence 33
Nuremberg 33
Paris 33
Shanghai 33
Cesena 32
Taipei 32
London 31
Amsterdam 30
Phoenix 29
San Diego 29
The Dalles 29
São Paulo 28
Amman 27
Dearborn 27
Modena 26
Orem 26
Istanbul 25
Jinan 25
Tianjin 25
Brussels 24
Redwood City 24
Brandenburg 23
Naples 23
Vienna 23
Atlanta 22
Falls Church 22
Lappeenranta 22
Padova 22
Warsaw 22
Delft 21
Lomé 21
Toronto 21
Sant Esteve de Palautordera 20
Shenyang 20
Can Tho 19
Montreal 19
Changsha 18
Des Moines 18
Falkenstein 18
Hangzhou 18
Norwalk 18
Zhengzhou 18
Bari 17
Castel Maggiore 17
Ravenna 17
Totale 12.858
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Nome #
Enabling the Heterogeneous Accelerator Model on Ultra-Low Power Microcontroller Platforms 614
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions 422
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS 408
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 339
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning 334
Robust Real-Time Embedded EMG Recognition Framework Using Temporal Convolutional Networks on a Multicore IoT Processor 334
A mixed-precision RISC-V processor for extreme-edge DNN inference 330
PULP: A parallel ultra low power platform for next generation IoT applications 329
A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing 294
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics 292
Work-in-Progress: Quantized NNs as the Definitive solution for inference on low-power ARM MCUs? 285
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications 280
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors 277
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks 273
GAP-8: A RISC-V SoC for AI at the Edge of the IoT 270
Accelerated Visual Context Classification on a Low-Power Smartwatch 255
Memory-Latency-Accuracy Trade-Offs for Continual Learning on a RISC-V Extreme-Edge Node 254
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision 248
PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters 246
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 244
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing 238
A TinyML Platform for On-Device Continual Learning with Quantized Latent Replays 237
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 233
A 64mW DNN-based Visual Navigation Engine for Autonomous Nano-Drones 224
Enabling mixed-precision quantized neural networks in extreme-edge devices 222
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors 219
Work-in-progress: Dory: Lightweight memory hierarchy management for deep NN inference on iot endnodes 218
A Sim-to-Real Deep Learning-based Framework for Autonomous Nano-drone Racing 217
Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow 215
Curbing the roofline: a scalable and flexible architecture for CNNs on FPGA 215
Energy efficient parallel computing on the PULP platform with support for OpenMP 214
Brain-inspired classroom occupancy monitoring on a low-power mobile platform 212
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes 211
NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 210
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors 208
Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference 195
An Open Source and Open Hardware Deep Learning-Powered Visual Navigation Engine for Autonomous Nano-UAVs 191
A Microcontroller is All You Need: Enabling Transformer Execution on Low-Power IoT Endnodes 188
Fully Onboard AI-powered Human-Drone Pose Estimation on Ultra-low Power Autonomous Flying Nano-UAVs 187
An Extreme-Edge TCN-Based Low-Latency Collision-Avoidance Safety System for Industrial Machinery 186
On-the-fly adaptivity for process networks over shared-memory platforms 186
Energy-efficient vision on the PULP platform for ultra-low power parallel computing 186
End-To-end 100-TOPS/W Inference with Analog In-Memory Computing: Are We There Yet? 185
Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters 184
Always-On 674μW@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node 183
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge 182
Optimizing BFloat16 Deployment of Tiny Transformers on Ultra-Low Power Extreme Edge SoCs 180
PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision 178
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs 178
Exploring NEURAGHE: A Customizable Template for APSoC-based CNN Inference at the Edge 175
Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training 171
An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-To-Information Extraction 170
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture 169
Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 169
Thermal Image-based CNN's for Ultra-low Power People Recognition 168
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine 166
Deeploy: Enabling Energy-Efficient Deployment of Small Language Models on Heterogeneous Microcontrollers 166
Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS 166
Optimization and deployment of CNNs at the Edge: The ALOHA experience 166
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference 165
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors 165
XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference 165
He-P2012: Architectural heterogeneity exploration on a scalable many-core platform 160
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space 159
He-P2012: Performance and Energy Exploration of Architecturally Heterogeneous Many-Cores 159
Improving Autonomous Nano-Drones Performance via Automated End-to-End Optimization and Deployment of DNNs 159
A Ultra-Low-Energy Convolution Engine for Fast Brain-Inspired Vision in Multicore Clusters 158
Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters 157
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks 156
SNE: an Energy-Proportional Digital Accelerator for Sparse Event-Based Convolutions 155
Distilling Tiny and Ultrafast Deep Neural Networks for Autonomous Navigation on Nano-UAVs 146
ALOHA: An Architectural-aware Framework for Deep Learning at the Edge 146
Quentin: an ultra-low-power PULPissimo SoC in 22nm FDX 145
RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration 144
Pruning in Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks 144
Online process transformation for polyhedral process networks in shared-memory MPSoCs 143
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge 142
Accelerating Image-based Pest Detection on a Heterogeneous Multicore Microcontroller 141
Temporal Variability Analysis in sEMG Hand Grasp Recognition using Temporal Convolutional Networks 131
Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing 129
TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference 126
Pushing On-chip Memories Beyond Reliability Boundaries in Micropower Machine Learning Applications 124
22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing 123
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training 121
AI-Powered Collision Avoidance Safety System for Industrial Woodworking Machinery 115
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference 115
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications 114
Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers 111
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms 109
Structured Sparse Back-propagation for Lightweight On-Device Continual Learning on Microcontroller Units 109
Open Source Heterogeneous SoCs for Artificial Intelligence: The PULP Platform experience 108
sEMG Neural Spikes Reconstruction for Gesture Recognition on a Low-Power Multicore Processor. In: Biomedical Circuits and Systems 108
RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project 107
Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH) 103
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays 100
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors 99
A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment 97
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs 96
A Multi-Precision Bit-Serial Hardware Accelerator IP for Deep Learning Enabled Internet-of-Things 96
Motor-Unit Ordering of Blindly-Separated Surface-EMG Signals for Gesture Recognition 95
Totale 19.241
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Categoria #
all - tutte 53.016
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 53.016
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021217 0 0 0 0 0 0 0 0 0 0 0 217
2021/20223.228 128 37 304 270 338 249 336 392 411 141 357 265
2022/20231.817 213 224 97 172 148 165 45 99 302 63 208 81
2023/2024907 31 98 66 60 103 116 102 52 28 92 75 84
2024/20253.523 139 389 340 220 463 184 270 236 109 190 253 730
2025/20268.632 588 779 672 545 864 403 964 398 1.519 749 705 446
Totale 21.086