CRIS Current Research Information System

CONTI, FRANCESCO
 Distribuzione geografica
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Continente #
NA - Nord America 8.499
AS - Asia 7.113
EU - Europa 5.206
Continente sconosciuto - Info sul continente non disponibili 451
SA - Sud America 391
AF - Africa 338
OC - Oceania 19
Totale 22.017
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Nazione #
US - Stati Uniti d'America 8.178
IT - Italia 1.858
CN - Cina 1.768
SG - Singapore 1.756
VN - Vietnam 1.355
DE - Germania 720
GB - Regno Unito 710
HK - Hong Kong 669
BD - Bangladesh 385
FR - Francia 324
IN - India 320
SE - Svezia 312
BR - Brasile 289
KR - Corea 249
NL - Olanda 243
CA - Canada 233
FI - Finlandia 167
RU - Federazione Russa 143
IE - Irlanda 137
JP - Giappone 133
CI - Costa d'Avorio 114
ES - Italia 113
CH - Svizzera 99
ZA - Sudafrica 84
TW - Taiwan 73
BG - Bulgaria 67
PH - Filippine 66
ID - Indonesia 61
SC - Seychelles 60
AT - Austria 48
TR - Turchia 46
UA - Ucraina 45
AR - Argentina 39
PL - Polonia 39
BE - Belgio 36
TH - Thailandia 34
EE - Estonia 30
GR - Grecia 30
MX - Messico 29
MY - Malesia 29
IQ - Iraq 28
JO - Giordania 27
PK - Pakistan 21
TG - Togo 21
AU - Australia 17
CR - Costa Rica 17
IL - Israele 16
RO - Romania 16
EC - Ecuador 15
DZ - Algeria 13
CL - Cile 12
CO - Colombia 12
DK - Danimarca 11
IR - Iran 11
SA - Arabia Saudita 11
UZ - Uzbekistan 10
LB - Libano 9
LT - Lituania 9
AE - Emirati Arabi Uniti 8
HR - Croazia 8
JM - Giamaica 8
PE - Perù 8
ET - Etiopia 7
KE - Kenya 7
MA - Marocco 7
EG - Egitto 6
GH - Ghana 6
GT - Guatemala 6
HN - Honduras 6
LU - Lussemburgo 6
PY - Paraguay 6
DO - Repubblica Dominicana 5
NO - Norvegia 5
NP - Nepal 5
OM - Oman 5
PT - Portogallo 5
VE - Venezuela 5
AZ - Azerbaigian 4
CZ - Repubblica Ceca 4
LV - Lettonia 4
SK - Slovacchia (Repubblica Slovacca) 4
TN - Tunisia 4
BB - Barbados 3
BO - Bolivia 3
BY - Bielorussia 3
NG - Nigeria 3
SI - Slovenia 3
TT - Trinidad e Tobago 3
A2 - ???statistics.table.value.countryCode.A2??? 2
HT - Haiti 2
HU - Ungheria 2
IS - Islanda 2
KW - Kuwait 2
KZ - Kazakistan 2
LA - Repubblica Popolare Democratica del Laos 2
MD - Moldavia 2
MN - Mongolia 2
NZ - Nuova Zelanda 2
SV - El Salvador 2
UY - Uruguay 2
Totale 21.548
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Città #
Ann Arbor 1.797
Singapore 1.215
Ashburn 686
Hong Kong 606
Southend 488
San Jose 445
Hefei 438
Chandler 420
Bologna 399
Santa Clara 361
Fairfield 357
Ho Chi Minh City 323
Hanoi 287
Munich 259
Seoul 202
Los Angeles 199
Wilmington 184
Woodbridge 177
Council Bluffs 175
Beijing 167
New York 162
Seattle 157
Houston 135
Dublin 134
Milan 133
Princeton 133
Dallas 131
Montréal 123
Cambridge 118
Boardman 116
Helsinki 115
Turin 115
Abidjan 114
Mcallen 103
Lauterbourg 89
Rome 88
Tokyo 88
Buffalo 77
Sofia 66
Chicago 54
Frankfurt am Main 53
Dong Ket 51
Berlin 50
Da Nang 50
Haiphong 50
Guangzhou 49
Medford 48
Redmond 48
Nanjing 47
Bengaluru 46
Johannesburg 44
Westminster 41
Jakarta 37
Zurich 37
Redondo Beach 36
Phoenix 35
Shanghai 34
Florence 33
London 33
Nuremberg 33
Paris 33
Cesena 32
Taipei 32
San Diego 31
The Dalles 31
Amsterdam 30
Atlanta 29
São Paulo 28
Amman 27
Dearborn 27
Naples 27
Istanbul 26
Modena 26
Orem 26
Jinan 25
Tianjin 25
Toronto 25
Brussels 24
Redwood City 24
Vienna 24
Brandenburg 23
Falls Church 23
Lappeenranta 22
Padova 22
Warsaw 22
Delft 21
Lomé 21
Montreal 21
Rimini 20
Sant Esteve de Palautordera 20
Shenyang 20
Can Tho 19
San Lazzaro di Savena 19
Changsha 18
Des Moines 18
Falkenstein 18
Hangzhou 18
Norwalk 18
Zhengzhou 18
Bari 17
Totale 13.241
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Nome #
Enabling the Heterogeneous Accelerator Model on Ultra-Low Power Microcontroller Platforms 617
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions 465
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS 413
Robust Real-Time Embedded EMG Recognition Framework Using Temporal Convolutional Networks on a Multicore IoT Processor 354
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 351
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning 348
A mixed-precision RISC-V processor for extreme-edge DNN inference 336
PULP: A parallel ultra low power platform for next generation IoT applications 331
A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing 304
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics 294
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications 287
Work-in-Progress: Quantized NNs as the Definitive solution for inference on low-power ARM MCUs? 286
GAP-8: A RISC-V SoC for AI at the Edge of the IoT 284
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks 283
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors 282
Memory-Latency-Accuracy Trade-Offs for Continual Learning on a RISC-V Extreme-Edge Node 259
Accelerated Visual Context Classification on a Low-Power Smartwatch 255
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision 255
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing 250
PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters 249
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 249
A TinyML Platform for On-Device Continual Learning with Quantized Latent Replays 245
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 235
A Sim-to-Real Deep Learning-based Framework for Autonomous Nano-drone Racing 230
A 64mW DNN-based Visual Navigation Engine for Autonomous Nano-Drones 229
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors 227
Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow 226
Enabling mixed-precision quantized neural networks in extreme-edge devices 224
Work-in-progress: Dory: Lightweight memory hierarchy management for deep NN inference on iot endnodes 222
Curbing the roofline: a scalable and flexible architecture for CNNs on FPGA 218
Energy efficient parallel computing on the PULP platform with support for OpenMP 217
Brain-inspired classroom occupancy monitoring on a low-power mobile platform 214
NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 213
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes 212
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors 210
A Microcontroller is All You Need: Enabling Transformer Execution on Low-Power IoT Endnodes 205
Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference 197
An Extreme-Edge TCN-Based Low-Latency Collision-Avoidance Safety System for Industrial Machinery 194
RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration 194
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge 193
An Open Source and Open Hardware Deep Learning-Powered Visual Navigation Engine for Autonomous Nano-UAVs 192
End-To-end 100-TOPS/W Inference with Analog In-Memory Computing: Are We There Yet? 191
Fully Onboard AI-powered Human-Drone Pose Estimation on Ultra-low Power Autonomous Flying Nano-UAVs 190
Optimizing BFloat16 Deployment of Tiny Transformers on Ultra-Low Power Extreme Edge SoCs 189
On-the-fly adaptivity for process networks over shared-memory platforms 188
Energy-efficient vision on the PULP platform for ultra-low power parallel computing 188
Always-On 674μW@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node 187
Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters 185
PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision 182
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs 179
Exploring NEURAGHE: A Customizable Template for APSoC-based CNN Inference at the Edge 177
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine 176
Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training 172
Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 172
An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-To-Information Extraction 171
Thermal Image-based CNN's for Ultra-low Power People Recognition 170
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference 169
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture 169
Deeploy: Enabling Energy-Efficient Deployment of Small Language Models on Heterogeneous Microcontrollers 169
Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS 168
XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference 167
Optimization and deployment of CNNs at the Edge: The ALOHA experience 167
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors 166
Improving Autonomous Nano-Drones Performance via Automated End-to-End Optimization and Deployment of DNNs 166
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space 162
He-P2012: Architectural heterogeneity exploration on a scalable many-core platform 161
Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters 160
He-P2012: Performance and Energy Exploration of Architecturally Heterogeneous Many-Cores 160
A Ultra-Low-Energy Convolution Engine for Fast Brain-Inspired Vision in Multicore Clusters 160
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks 159
SNE: an Energy-Proportional Digital Accelerator for Sparse Event-Based Convolutions 156
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays 155
Distilling Tiny and Ultrafast Deep Neural Networks for Autonomous Navigation on Nano-UAVs 154
Accelerating Image-based Pest Detection on a Heterogeneous Multicore Microcontroller 150
ALOHA: An Architectural-aware Framework for Deep Learning at the Edge 148
Quentin: an ultra-low-power PULPissimo SoC in 22nm FDX 148
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge 147
Pruning in Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks 147
Online process transformation for polyhedral process networks in shared-memory MPSoCs 146
Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing 143
Temporal Variability Analysis in sEMG Hand Grasp Recognition using Temporal Convolutional Networks 137
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications 136
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training 134
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms 132
22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing 128
TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference 128
Open Source Heterogeneous SoCs for Artificial Intelligence: The PULP Platform experience 127
Pushing On-chip Memories Beyond Reliability Boundaries in Micropower Machine Learning Applications 127
Structured Sparse Back-propagation for Lightweight On-Device Continual Learning on Microcontroller Units 120
Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers 120
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference 119
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs 118
AI-Powered Collision Avoidance Safety System for Industrial Woodworking Machinery 118
A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU 109
sEMG Neural Spikes Reconstruction for Gesture Recognition on a Low-Power Multicore Processor. In: Biomedical Circuits and Systems 109
RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project 107
Multi-Mode Borderguard Controllers for Efficient On-Chip Communication in Heterogeneous Digital/Analog Neural Processing Units 107
Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH) 104
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors 99
A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment 99
Totale 19.941
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Categoria #
all - tutte 56.631
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 56.631
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20223.100 0 37 304 270 338 249 336 392 411 141 357 265
2022/20231.817 213 224 97 172 148 165 45 99 302 63 208 81
2023/2024907 31 98 66 60 103 116 102 52 28 92 75 84
2024/20253.523 139 389 340 220 463 184 270 236 109 190 253 730
2025/20268.725 588 779 672 545 864 403 964 398 1.519 749 705 539
2026/2027838 433 405 0 0 0 0 0 0 0 0 0 0
Totale 22.017