CRIS Current Research Information System

CONTI, FRANCESCO
 Distribuzione geografica
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Continente #
NA - Nord America 6.495
AS - Asia 4.557
EU - Europa 4.283
SA - Sud America 295
AF - Africa 268
OC - Oceania 11
Continente sconosciuto - Info sul continente non disponibili 3
Totale 15.912
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Nazione #
US - Stati Uniti d'America 6.302
SG - Singapore 1.513
CN - Cina 1.397
IT - Italia 1.354
DE - Germania 679
GB - Regno Unito 679
HK - Hong Kong 448
VN - Vietnam 416
SE - Svezia 274
IN - India 231
BR - Brasile 230
KR - Corea 225
NL - Olanda 200
FR - Francia 199
CA - Canada 172
FI - Finlandia 144
RU - Federazione Russa 137
IE - Irlanda 124
CI - Costa d'Avorio 113
ES - Italia 92
CH - Svizzera 83
JP - Giappone 74
BG - Bulgaria 66
SC - Seychelles 57
ID - Indonesia 51
ZA - Sudafrica 49
AT - Austria 45
TW - Taiwan 40
UA - Ucraina 37
TR - Turchia 33
AR - Argentina 31
EE - Estonia 29
PL - Polonia 29
BE - Belgio 28
JO - Giordania 27
GR - Grecia 22
TG - Togo 21
PH - Filippine 15
IL - Israele 14
MY - Malesia 13
RO - Romania 13
IR - Iran 11
AU - Australia 9
DZ - Algeria 9
EC - Ecuador 9
CL - Cile 8
HR - Croazia 8
LT - Lituania 8
LB - Libano 7
MX - Messico 7
DK - Danimarca 6
LU - Lussemburgo 6
AE - Emirati Arabi Uniti 5
BD - Bangladesh 5
IQ - Iraq 5
UZ - Uzbekistan 5
CO - Colombia 4
CR - Costa Rica 4
CZ - Repubblica Ceca 4
DO - Repubblica Dominicana 4
EG - Egitto 4
KE - Kenya 4
MA - Marocco 4
NO - Norvegia 4
PE - Perù 4
PK - Pakistan 4
PY - Paraguay 4
TH - Thailandia 4
NP - Nepal 3
SI - Slovenia 3
A2 - ???statistics.table.value.countryCode.A2??? 2
AZ - Azerbaigian 2
BO - Bolivia 2
BY - Bielorussia 2
HU - Ungheria 2
LA - Repubblica Popolare Democratica del Laos 2
LV - Lettonia 2
NG - Nigeria 2
NZ - Nuova Zelanda 2
SK - Slovacchia (Repubblica Slovacca) 2
VE - Venezuela 2
BA - Bosnia-Erzegovina 1
BB - Barbados 1
CY - Cipro 1
ET - Etiopia 1
EU - Europa 1
GH - Ghana 1
GT - Guatemala 1
HN - Honduras 1
JM - Giamaica 1
KW - Kuwait 1
KZ - Kazakistan 1
LK - Sri Lanka 1
MD - Moldavia 1
MU - Mauritius 1
OM - Oman 1
PS - Palestinian Territory 1
QA - Qatar 1
SV - El Salvador 1
TN - Tunisia 1
Totale 15.909
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Città #
Ann Arbor 1.797
Singapore 1.003
Ashburn 515
Southend 488
Hefei 435
Chandler 419
Hong Kong 417
Fairfield 357
Bologna 330
Santa Clara 312
Munich 257
Seoul 202
Wilmington 184
Woodbridge 177
Seattle 147
Beijing 144
Princeton 132
Houston 128
Dublin 124
Montréal 123
Cambridge 118
Abidjan 113
Boardman 111
Turin 106
Dallas 103
Mcallen 103
Helsinki 101
Los Angeles 95
Ho Chi Minh City 89
Milan 81
Hanoi 69
Sofia 66
Buffalo 62
Dong Ket 51
Tokyo 51
Rome 50
Redmond 48
Medford 47
New York 47
Berlin 46
Bengaluru 45
Nanjing 45
Westminster 41
Redondo Beach 36
Jakarta 35
Chicago 34
Frankfurt am Main 33
Cesena 32
Nuremberg 31
Florence 29
San Diego 29
Zurich 28
Amman 27
Dearborn 26
Amsterdam 25
Shanghai 25
Jinan 24
Redwood City 24
Taipei 24
Brandenburg 23
Guangzhou 23
London 23
Falls Church 22
Padova 22
São Paulo 22
Tianjin 22
Vienna 22
Lomé 21
Istanbul 20
Paris 20
Phoenix 20
Sant Esteve de Palautordera 20
Shenyang 20
Brussels 19
Lappeenranta 19
Falkenstein 18
Norwalk 18
Castel Maggiore 17
Ravenna 17
Warsaw 17
Changsha 16
Bern 15
Bühl 15
Forlì 15
Saint Petersburg 15
San Lazzaro di Savena 15
Toronto 15
Zhengzhou 15
Des Moines 14
Hangzhou 14
Johannesburg 14
Modena 14
The Dalles 14
Tongling 14
Bagnacavallo 13
Haiphong 13
Boydton 12
Duncan 12
Kansas City 12
Nanchang 12
Totale 10.545
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Nome #
Enabling the Heterogeneous Accelerator Model on Ultra-Low Power Microcontroller Platforms 603
Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS 364
PULP: A parallel ultra low power platform for next generation IoT applications 307
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions 304
A mixed-precision RISC-V processor for extreme-edge DNN inference 283
4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 269
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning 251
Robust Real-Time Embedded EMG Recognition Framework Using Temporal Convolutional Networks on a Multicore IoT Processor 247
Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications 244
Work-in-Progress: Quantized NNs as the Definitive solution for inference on low-power ARM MCUs? 243
Accelerated Visual Context Classification on a Low-Power Smartwatch 234
An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics 232
A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision 231
A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing 220
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors 217
Memory-Latency-Accuracy Trade-Offs for Continual Learning on a RISC-V Extreme-Edge Node 213
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks 203
Energy efficient parallel computing on the PULP platform with support for OpenMP 200
PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters 199
Enabling mixed-precision quantized neural networks in extreme-edge devices 199
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 194
Brain-inspired classroom occupancy monitoring on a low-power mobile platform 192
A 64mW DNN-based Visual Navigation Engine for Autonomous Nano-Drones 191
GAP-8: A RISC-V SoC for AI at the Edge of the IoT 186
NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs 185
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes 185
Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference 178
Work-in-progress: Dory: Lightweight memory hierarchy management for deep NN inference on iot endnodes 178
Curbing the roofline: a scalable and flexible architecture for CNNs on FPGA 175
GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors 175
An Open Source and Open Hardware Deep Learning-Powered Visual Navigation Engine for Autonomous Nano-UAVs 174
Energy-efficient vision on the PULP platform for ultra-low power parallel computing 173
On-the-fly adaptivity for process networks over shared-memory platforms 172
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors 169
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode 168
An Extreme-Edge TCN-Based Low-Latency Collision-Avoidance Safety System for Industrial Machinery 167
Always-On 674μW@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node 166
Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters 164
PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision 160
Exploring NEURAGHE: A Customizable Template for APSoC-based CNN Inference at the Edge 157
A Microcontroller is All You Need: Enabling Transformer Execution on Low-Power IoT Endnodes 157
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing 156
A Sim-to-Real Deep Learning-based Framework for Autonomous Nano-drone Racing 154
Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS 154
Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow 153
An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-To-Information Extraction 151
Fully Onboard AI-powered Human-Drone Pose Estimation on Ultra-low Power Autonomous Flying Nano-UAVs 151
He-P2012: Architectural heterogeneity exploration on a scalable many-core platform 150
Thermal Image-based CNN's for Ultra-low Power People Recognition 150
A Ultra-Low-Energy Convolution Engine for Fast Brain-Inspired Vision in Multicore Clusters 148
XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference 148
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs 148
Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training 145
Synthesis-friendly techniques for tightly-coupled integration of hardware accelerators into shared-memory multi-core clusters 145
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference 143
Optimizing BFloat16 Deployment of Tiny Transformers on Ultra-Low Power Extreme Edge SoCs 140
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture 140
He-P2012: Performance and Energy Exploration of Architecturally Heterogeneous Many-Cores 140
End-To-end 100-TOPS/W Inference with Analog In-Memory Computing: Are We There Yet? 140
Optimization and deployment of CNNs at the Edge: The ALOHA experience 139
ALOHA: An Architectural-aware Framework for Deep Learning at the Edge 138
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space 137
A TinyML Platform for On-Device Continual Learning with Quantized Latent Replays 137
SNE: an Energy-Proportional Digital Accelerator for Sparse Event-Based Convolutions 135
Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine 135
Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge 132
Improving Autonomous Nano-Drones Performance via Automated End-to-End Optimization and Deployment of DNNs 131
Deeploy: Enabling Energy-Efficient Deployment of Small Language Models on Heterogeneous Microcontrollers 130
Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode 129
Online process transformation for polyhedral process networks in shared-memory MPSoCs 128
Quentin: an ultra-low-power PULPissimo SoC in 22nm FDX 126
Temporal Variability Analysis in sEMG Hand Grasp Recognition using Temporal Convolutional Networks 124
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors 121
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge 116
Pushing On-chip Memories Beyond Reliability Boundaries in Micropower Machine Learning Applications 115
Pruning in Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks 115
Distilling Tiny and Ultrafast Deep Neural Networks for Autonomous Navigation on Nano-UAVs 111
RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration 110
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks 108
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training 102
TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference 99
Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors 94
AI-Powered Collision Avoidance Safety System for Industrial Woodworking Machinery 91
Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH) 86
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays 82
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference 82
A Multi-Precision Bit-Serial Hardware Accelerator IP for Deep Learning Enabled Internet-of-Things 81
RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project 80
sEMG Neural Spikes Reconstruction for Gesture Recognition on a Low-Power Multicore Processor. In: Biomedical Circuits and Systems 80
Motor-Unit Ordering of Blindly-Separated Surface-EMG Signals for Gesture Recognition 77
A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment 76
Fünfiiber-Drone: A Modular Open-Platform 18-grams Autonomous Nano-Drone 76
22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing 73
RNN-Based Radio Resource Management on Multicore RISC-V Accelerator Architectures 69
Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers 67
TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference 66
Accelerating Image-based Pest Detection on a Heterogeneous Multicore Microcontroller 65
HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms 64
WIP: Automatic DNN Deployment on Heterogeneous Platforms: The GAP9 Case Study 64
To buffer, or not to buffer? A case study on FFT accelerators for ultra-low-power multicore clusters 63
Totale 15.739
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Categoria #
all - tutte 43.678
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 43.678
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021638 0 0 0 0 0 64 47 47 116 102 45 217
2021/20223.228 128 37 304 270 338 249 336 392 411 141 357 265
2022/20231.817 213 224 97 172 148 165 45 99 302 63 208 81
2023/2024907 31 98 66 60 103 116 102 52 28 92 75 84
2024/20253.523 139 389 340 220 463 184 270 236 109 190 253 730
2025/20263.842 588 779 672 545 864 394 0 0 0 0 0 0
Totale 16.296