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EnglishOMANA, MARTIN EUGENIO
Risultati 1 - 20 di 60 (tempo di esecuzione: 0.001 secondi).
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | |
|---|---|---|---|---|---|---|
| 1 | Transient Fault and Soft Error On-Die Monitor | D. Rossi; M. Omaña; C. Metra | 2010 | G. Chapman, F. Salice, H. Ito, S. Tragoudas | 4.01 Contributo in Atti di convegno | |
| 2 | The Other Side of the Timing Equation: a Result of Clock Faults | M. Omaña; D. Rossi; J. M. Cazeaux; TM. Mak; C. Metra | 2005 | R. Aitken, H. Ito, C. Metra, N. Park | 4.01 Contributo in Atti di convegno | |
| 3 | Should We Make Our Design for Testability Schemes Fault Secure ? | C. Metra; T. M. Mak; M. Omaña | 2004 | IEEE | 4.01 Contributo in Atti di convegno | |
| 4 | Self-Checking Monitor for NBTI Due Degradation | M. Omaña; D. Rossi; N. Bosio; C. Metra | 2010 | F. Azais, K. Chakrabarty | 4.01 Contributo in Atti di convegno | |
| 5 | Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST | Omaña, Martin; Rossi, Daniele; Fuzzi, Filippo; Metra, Cecilia; Tirumurti, Chandrasekharan Chandra; Galivanche, Rajesh | 2017 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 1.01 Articolo in rivista | |
| 6 | Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing | C. Metra; T. M. Mak; M. Omaña | 2004 | s.n | 4.01 Contributo in Atti di convegno | |
| 7 | Power droop reduction during Launch-On-Shift scan-based logic BIST | M. Omaña; D. Rossi; E. Beniamino; C. Metra; C. Tirumurti; R. Galivanche | 2014 | 4.01 Contributo in Atti di convegno | ||
| 8 | Polynomial Based Key Distribution Scheme for WPAN | R. Vimalathithan; D. Rossi; M. Omaña; C. Metra; M.L.Valarmathi | 2013 | MALAYSIAN JOURNAL OF MATHEMATICAL SCIENCES | 1.01 Articolo in rivista | |
| 9 | Polynomial Based Key Distribution Scheme for WPAN | Vimalathithan R.; D. Rossi; M. Omaña; C. Metra; M. L. Valarmathi | 2012 | s.n | 4.01 Contributo in Atti di convegno | |
| 10 | Path (Min) delay Faults and Their Impact on Self-Checking Circuits' Operation | C. Metra; M. Omaña; D. Rossi; J.M. Cazeaux; TM Mak | 2006 | C. Metra, M. Nicolaidis, R. Aitken, R. Leveugle | 4.01 Contributo in Atti di convegno | |
| 11 | On-Transistor Level Gate Sizing for Increased Robustness to Transient Faults | J. M. Cazeaux; D. Rossi; M. Omaña; A. Chatterjee; C. Metra | 2005 | C. Metra, K. Roy, L. Anghel, M. Nicolaidis | 4.01 Contributo in Atti di convegno | |
| 12 | On-Die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter | M. Omaña; D. Giaffreda; C. Metra; TM Mak; S. Tam; A. Rahman | 2010 | G. Chapman, F. Salice, H. Ito, S. Tragoudas | 4.01 Contributo in Atti di convegno | |
| 13 | On the Selection of Unidirectional Error detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization | M. Omaña; O. Losco; C. Metra; A. Pagni | 2005 | C. Metra, K. Roy, L. Anghel, and M. Nicolaidis | 4.01 Contributo in Atti di convegno | |
| 14 | Novel On-Chip Clock Jitter Measurement Scheme For High Performance Microprocessors | C. Metra; M. Omaña; T.M. Mak; A. Rahman; S. Tam | 2008 | D, Gizopoulos, M. Tehranipoor | 4.01 Contributo in Atti di convegno | |
| 15 | Novel On-Chip Circuit for Jitter Testing in High-Speed PLLs | J.M. Cazeaux; M. Omaña; C. Metra | 2005 | IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT | 1.01 Articolo in rivista | |
| 16 | Novel Low-Cost Aging Sensor | M. Omaña; D. Rossi; N. Bosio; C. Metra | 2010 | N.M. Amato, H. Franke, P.H.J. Kelly | 4.01 Contributo in Atti di convegno | |
| 17 | Novel High Speed Robust Latch | M. Omaña; D. Rossi; C. Metra | 2009 | D. Gizopoulos, M. Tehranipoor, S. Tragoudas | 4.01 Contributo in Atti di convegno | |
| 18 | Novel Compensation Scheme for Local Clocks of High Performance Microprocessors | C. Metra; M. Omaña; TM Mak; S. Tam | 2007 | J. E. Sibert, D. Young | 4.01 Contributo in Atti di convegno | |
| 19 | Novel Approach to Reduce Power Droop During Scan-Based Logic BIST | M. Omaña; D. Rossi; F. Fuzzi; C. Metra; C. Tirumurti; R. Galivanche | 2013 | IEEE Computer Society | 4.01 Contributo in Atti di convegno | |
| 20 | Novel Approach to Clock Fault Testing for High Performance Microprocessors | C. Metra; M. Omaña; TM Mak; S. Tam | 2007 | P. Prinetto, H. Wunderlich | 4.01 Contributo in Atti di convegno |
Nome completo:
OMANA, MARTIN EUGENIO
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