Feasibility of Physical Unclonable Function (PUF) Implementation Using the Pull-up/Pull-down Resistances Integrated in Microcontrollers GPIO

Security in wireless sensor networks is usually improved by lightweight authentication and data obfuscation approaches. In such wireless networks, authentication passwords and cryptographic keys can be generated at low cost by Physical Unclonable Function (PUF) devices, that exploit the occurrence of random variations in CMOS technology parameters during manufacturing. In this paper, we study the feasibility to implement PUFs by exploiting the pull-up and pull-down resistances integrated in the General Purpose Input Output (GPIO) interface of microcontrollers. For our study, we performed experimental measurements of the considered PUF on five different STM32F103C8T6 microcontrollers, and we derived its PUF performance metrics commonly used in the literature (uniqueness, uniformity, steadiness, reliability to temperature fluctuations and reliability to power supply fluctuations). The results have shown that different groups of microcontroller pins, that are able to tolerate different maximum voltages, can be characterized by significant differences in the values of the pull-up/pull-down resistances and thus on the performance of the designed PUF. The best results have been obtained for the case of the pull-up resistances of 5V tolerant pins, for which we have obtained a uniqueness of 44.92%, a uniformity of 53.31%, a steadiness of a 99.41%, a reliability for temperature fluctuations of 97.57%, and a reliability for power supply fluctuations of 99.84%.