CRIS Current Research Information System

ANGIOLINI, FEDERICO
 Distribuzione geografica
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Continente #
NA - Nord America 3.411
AS - Asia 1.803
EU - Europa 1.405
SA - Sud America 93
AF - Africa 62
OC - Oceania 2
Continente sconosciuto - Info sul continente non disponibili 1
Totale 6.777
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Nazione #
US - Stati Uniti d'America 3.401
CN - Cina 541
SG - Singapore 483
VN - Vietnam 446
GB - Regno Unito 432
DE - Germania 202
UA - Ucraina 192
IT - Italia 139
HK - Hong Kong 112
SE - Svezia 108
FR - Francia 98
RU - Federazione Russa 87
IN - India 84
BR - Brasile 65
IE - Irlanda 51
JP - Giappone 39
ZA - Sudafrica 29
JO - Giordania 27
EE - Estonia 26
FI - Finlandia 24
KR - Corea 20
BE - Belgio 14
SC - Seychelles 14
AR - Argentina 12
CI - Costa d'Avorio 11
NL - Olanda 7
TR - Turchia 7
AT - Austria 6
PH - Filippine 6
TH - Thailandia 6
BG - Bulgaria 5
EC - Ecuador 5
GR - Grecia 5
IQ - Iraq 5
MX - Messico 5
TG - Togo 5
BD - Bangladesh 4
ID - Indonesia 4
LB - Libano 4
CA - Canada 3
CO - Colombia 3
SA - Arabia Saudita 3
UY - Uruguay 3
UZ - Uzbekistan 3
ES - Italia 2
KZ - Kazakistan 2
NZ - Nuova Zelanda 2
PE - Perù 2
PK - Pakistan 2
RO - Romania 2
RS - Serbia 2
TW - Taiwan 2
AO - Angola 1
AZ - Azerbaigian 1
CH - Svizzera 1
CL - Cile 1
EU - Europa 1
HN - Honduras 1
MA - Marocco 1
NP - Nepal 1
OM - Oman 1
PL - Polonia 1
PT - Portogallo 1
PY - Paraguay 1
TN - Tunisia 1
TT - Trinidad e Tobago 1
VE - Venezuela 1
Totale 6.777
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Città #
Ann Arbor 1.289
Southend 384
Singapore 331
Fairfield 224
Santa Clara 182
Chandler 178
Ashburn 167
Dong Ket 164
Wilmington 146
Jacksonville 139
Woodbridge 117
Hong Kong 108
Seattle 107
Hefei 94
San Jose 92
Princeton 85
Cambridge 80
Houston 78
Beijing 71
Ho Chi Minh City 65
Hanoi 61
Dublin 51
Boardman 46
Berlin 40
Lauterbourg 38
Nanjing 38
Padova 38
Turin 38
Westminster 38
Tokyo 36
Amman 26
Medford 26
Helsinki 23
Jinan 23
Buffalo 21
Mülheim 21
Los Angeles 20
Seoul 19
Shenyang 19
San Diego 17
Saint Petersburg 16
Guangzhou 14
Mahé 14
The Dalles 14
Dallas 13
Milan 13
Hebei 12
Nanchang 12
Abidjan 11
Changsha 11
Brussels 10
Tianjin 10
Zhengzhou 10
Frankfurt am Main 9
Taizhou 9
Bologna 8
Haiphong 8
Verona 8
Ningbo 7
Bühl 6
Da Nang 6
Shanghai 6
São Paulo 6
Can Tho 5
Dearborn 5
Des Moines 5
Falkenstein 5
Haikou 5
Hangzhou 5
Istanbul 5
Lanzhou 5
Lomé 5
Norwalk 5
Olalla 5
Orem 5
Sofia 5
Bengaluru 4
Brooklyn 4
Fuzhou 4
Hải Dương 4
Jiaxing 4
Moscow 4
Ninh Bình 4
Phoenix 4
Rio de Janeiro 4
Shenzhen 4
Atlanta 3
Bangkok 3
Chengdu 3
Chicago 3
Florence 3
Guayaquil 3
Kunming 3
New York 3
Redondo Beach 3
Redwood City 3
Stockholm 3
Taiyuan 3
Xi'an 3
Amsterdam 2
Totale 5.119
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Nome #
A Method for Calculating Hard QoS Guarantees for Networks-on-Chip 235
A Reactive and Cycle-True IP Emulator for MPSoC Exploration 230
A Post-Compiler Approach to Scratchpad Mapping of Code 224
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs 220
Scalability Analysis of Evolving SoC Interconnect Protocols 218
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology 218
An Efficient Profile-Based Algorithm for Scratchpad Memory Partitioning 216
Area and Power Modeling for Networks-on-Chip with Layout Awareness 206
Exploring architectural solutions for energy optimisations in bus-based system-on-chip 206
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip 204
Analyzing On-Chip Communication in a MPSoC Environment 202
An integrated, programming model-driven framework for NoC–QoS support in cluster-based embedded many-cores 201
An integrated open framework for heterogeneous MPSoC design space exploration 190
Computing Accurate Performance Bounds for Best Effort Networks-on-Chip 188
Developing Mesochronous Synchronizers to Enable 3D NoCs 184
Bringing NoCs to 65 nm 182
Fault Tolerance Overhead in Network-on-Chip Flow Control Schemes 181
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips 181
Designing Routing and Message-Dependent Deadlock Free Networks on Chips. 180
Networks on Chips: A Synthesis Perspective 179
Synthesis of low-overhead configurable source routing tables for network interfaces 178
NoC Design and Implementation in 65 nm Technology 175
Realistically Rendering SoC Traffic Patterns with Interrupt Awareness 174
Comparison of a Timing-Error Tolerant Scheme with a traditional Re-transmission Mechanism for Networks on Chips 174
A Traffic Injection Methodology with Support for System-Level Synchronization 171
Timing-Error-Tolerant Network-on-Chip Design Methodology 170
Network-On-Chip Design and Synthesis Outlook 163
Exploring programming model-driven QoS support for NoC-based platforms 161
Supporting vertical links for 3D networks on chip: toward an automated design and analysis flow 157
Networks-on-Chip: From Idea to Implementation 153
Designing Application-Specific Networks on Chips with Floorplan Information 152
Reliability Support for On-Chip Memories Using Networks-on-Chip 150
Networks on Chips: From research to products 149
Improving the Fault Tolerance of Nanometric PLA Designs 147
Contrasting a NoC and a traditional interconnect fabric with layout awareness 143
Simultaneous Memory and Bus Partitioning for SoC Architectures 129
Diseño de redes en chip de propósito específico con información de rutado físico 122
xpipes Lite: A Synthesis Oriented Design Flow For Networks on Chips 98
Totale 6.811
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Categoria #
all - tutte 15.403
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 15.403
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021283 0 0 0 0 0 0 0 0 0 40 34 209
2021/20221.869 84 12 238 212 246 199 202 195 213 49 94 125
2022/2023709 93 115 47 66 41 44 10 22 124 10 89 48
2023/2024109 11 30 6 7 7 14 7 8 2 9 3 5
2024/2025696 5 110 78 38 215 48 31 2 0 15 8 146
2025/20261.334 47 157 187 87 222 121 171 49 225 68 0 0
Totale 6.811