ANGIOLINI, FEDERICO

ANGIOLINI, FEDERICO  

DIP. DI ELETTRONICA,INFORMATICA,SISTEMISTICA-DEIS  

Mostra records
Risultati 1 - 20 di 38 (tempo di esecuzione: 0.034 secondi).
Titolo Autore(i) Anno Periodico Editore Tipo File
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs F. Angiolini; P. Meloni; S. Carta; L. Raffo; L. Benini 2007-01-01 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - 1.01 Articolo in rivista -
A Method for Calculating Hard QoS Guarantees for Networks-on-Chip D. Rahmati; S. Murali; L. Benini; F. Angiolini; G. De Micheli; H. Sarbazi-Azad 2009-01-01 - ACM 4.01 Contributo in Atti di convegno -
A Post-Compiler Approach to Scratchpad Mapping of Code F. Angiolini;F. Menichelli;A. Ferrero;L. Benini;M. Olivieri 2004-01-01 - s.n 4.01 Contributo in Atti di convegno -
A Reactive and Cycle-True IP Emulator for MPSoC Exploration S. Mahadevan; F. Angiolini; J. Sparsø; L. Benini; J. Madsen 2008-01-01 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - 1.01 Articolo in rivista -
An Efficient Profile-Based Algorithm for Scratchpad Memory Partitioning F. Angiolini; L. Benini; A. Caprara 2005-01-01 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - 1.01 Articolo in rivista -
An integrated open framework for heterogeneous MPSoC design space exploration F. Angiolini; J. Ceng; R. Leupers; F. Ferrari; C. Ferri; L. Benini 2006-01-01 - European Design and Automation Association 4.01 Contributo in Atti di convegno -
An integrated, programming model-driven framework for NoC–QoS support in cluster-based embedded many-cores J. Joven;A. Marongiu;F. Angiolini;L. Benini;G. De Micheli 2013-01-01 PARALLEL COMPUTING - 1.01 Articolo in rivista -
Analyzing On-Chip Communication in a MPSoC Environment M. Loghi;F. Angiolini;D. Bertozzi;L. Benini;R. Zafalon 2004-01-01 - s.n 4.01 Contributo in Atti di convegno -
Area and Power Modeling for Networks-on-Chip with Layout Awareness P. Meloni; I. Loi; F. Angiolini; S. Carta; M. Barbaro; L. Raffo; L. Benini 2007-01-01 VLSI DESIGN - 1.01 Articolo in rivista -
Bringing NoCs to 65 nm A. Pullini; F. Angiolini; S. Murali; D. Atienza; G. De Micheli; L. Benini 2007-01-01 IEEE MICRO - 1.01 Articolo in rivista -
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip Loi I.; Angiolini F.; Fujita S.; Mitra S.; Benini L. 2011-01-01 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS - 1.01 Articolo in rivista -
Comparison of a Timing-Error Tolerant Scheme with a traditional Re-transmission Mechanism for Networks on Chips S. Murali; R. Tamhankar; F. Angiolini; A. Pullini; D. Atienza; L. Benini; G. De Micheli 2006-01-01 - s.n 4.01 Contributo in Atti di convegno -
Computing Accurate Performance Bounds for Best Effort Networks-on-Chip Rahmati D., Murali S. ; Benini L. ; Angiolini F. ; De Micheli G. ; Sarbazi-Azad H. 2013-01-01 IEEE TRANSACTIONS ON COMPUTERS - 1.01 Articolo in rivista -
Contrasting a NoC and a traditional interconnect fabric with layout awareness F. Angiolini; P. Meloni; S. Carta; L. Benini; L. Raffo 2006-01-01 - European Design and Automation Association 4.01 Contributo in Atti di convegno -
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology Van der Plas G.; Limaye P.; Loi I.; Mercha A.; Oprins H.; Torregiani C.; Thijs S.; Linten D.; Stu...cchi M.; Katti G.; Velenis D.; Cherman V.; Vandevelde B.; Simons V.; De Wolf I.; Labie R.; Perry D.; Bronckers S.; Minas N.; Cupac M.; Ruythooren W.; Van Olmen J.; Phommahaxay A.; de Potter de ten Broeck M.; Opdebeeck A.; Rakowski M.; De Wachter B.; Dehan M.; Nelis M.; Agarwal R.; Pullini A.; Angiolini F.; Benini L.; Dehaene W.; Travaly Y.; Beyne E.; Marchal P. 2011-01-01 IEEE JOURNAL OF SOLID-STATE CIRCUITS - 1.01 Articolo in rivista -
Designing Application-Specific Networks on Chips with Floorplan Information S. Murali; P. Meloni; F. Angiolini; D. Atienza; S. Carta; L. Benini; G. De Micheli 2006-01-01 - s.n 4.01 Contributo in Atti di convegno -
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips S. Murali; P. Meloni; F. Angiolini; D. Atienza; S. Carta; L. Benini; G. De Micheli; L. Raffo 2006-01-01 - s.n 4.01 Contributo in Atti di convegno -
Designing Routing and Message-Dependent Deadlock Free Networks on Chips. S. Murali; P. Meloni; F. Angiolini; D. Atienza; S. Carta; L. Benini; G. De Micheli; L. Raffo. 2008-01-01 - Springer 4.01 Contributo in Atti di convegno -
Developing Mesochronous Synchronizers to Enable 3D NoCs I. Loi; F. Angiolini; L. Benini 2008-01-01 - s.n 4.01 Contributo in Atti di convegno -
Diseño de redes en chip de propósito específico con información de rutado físico D. Atienza; S. Murali; F. Angiolini; L. Benini; G. De Micheli; J.M. Mendias; R. Hermida 2006-01-01 - s.n 4.01 Contributo in Atti di convegno -