Very deep submicron process technologies are ideal application fields for NoCs, which offer a promising solution to the scalability problem. This article sheds light on the benefits and challenges of NoC-based interconnect design in nanometer CMOS. The authors present experimental results from fully working 65-nm NoC designs and a detailed scalability analysis.
A. Pullini, F. Angiolini, S. Murali, D. Atienza, G. De Micheli, L. Benini (2007). Bringing NoCs to 65 nm. IEEE MICRO, 27, Issue 5, Sept.-Oct. 2007, 75-85 [10.1109/MM.2007.4378785].
Bringing NoCs to 65 nm
ANGIOLINI, FEDERICO;BENINI, LUCA
2007
Abstract
Very deep submicron process technologies are ideal application fields for NoCs, which offer a promising solution to the scalability problem. This article sheds light on the benefits and challenges of NoC-based interconnect design in nanometer CMOS. The authors present experimental results from fully working 65-nm NoC designs and a detailed scalability analysis.File in questo prodotto:
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