In this paper, together with the accompanying Part I, an easy-to-implement electron mobility model which accurately predicts low-field mobility in bulkMOSFETs and UTB-SOI FETs fabricated on different crystal orientations is developed. In Part I, the general features of the model have been presented. In this Part II, the effects induced by extremely-small silicon thicknesses are addressed, namely, the scattering induced by interface states and silicon thickness fluctuations, intervalley-phonon scattering suppression, and surface optical phonons. Besides, corrections necessary for double-gate FETs are considered. This allows to extend the validity of the model presented in Part I to single and double-gate FETs with silicon thicknesses as small as about 2.5 nm.
L. Silvestri, S. Reggiani, E. Gnani, A. Gnudi, G. Baccarani (2010). A Low-Field Mobility Model for Bulk, Ultrathin Body SOI and Double-Gate n-MOSFETs With Different Surface and Channel Orientations—Part II: Ultrathin Silicon Films. IEEE TRANSACTIONS ON ELECTRON DEVICES, 57, 1575-1582 [10.1109/TED.2010.2049211].
A Low-Field Mobility Model for Bulk, Ultrathin Body SOI and Double-Gate n-MOSFETs With Different Surface and Channel Orientations—Part II: Ultrathin Silicon Films
SILVESTRI, LUCA;REGGIANI, SUSANNA;GNANI, ELENA;GNUDI, ANTONIO;BACCARANI, GIORGIO
2010
Abstract
In this paper, together with the accompanying Part I, an easy-to-implement electron mobility model which accurately predicts low-field mobility in bulkMOSFETs and UTB-SOI FETs fabricated on different crystal orientations is developed. In Part I, the general features of the model have been presented. In this Part II, the effects induced by extremely-small silicon thicknesses are addressed, namely, the scattering induced by interface states and silicon thickness fluctuations, intervalley-phonon scattering suppression, and surface optical phonons. Besides, corrections necessary for double-gate FETs are considered. This allows to extend the validity of the model presented in Part I to single and double-gate FETs with silicon thicknesses as small as about 2.5 nm.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.