A simulation study on the impact of interface traps (ITs) and strain on the I/V characteristics of co-optimized n- and p-type tunnel field-effect transistors (TFETs) realized on the same InAs/Al0.05Ga0.95Sb technology platform is carried out using a full-quantum simulator. In order to capture the effect of interface/border traps on the device electrostatics in a way consistent with the ballistic approach, the classical Shockley-Read-Hall theory has been properly generalized. Traps induce a significant reduction on the ON-current; however, the inclusion of a uniform strain induces a remarkable current enhancement able to completely recover the current degradation.
Visciarelli, M., Gnani, E., Gnudi, A., Reggiani, S., Baccarani, G. (2017). Investigation of the combined effect of traps and strain on optimized n- and p-type TFETs. Institute of Electrical and Electronics Engineers Inc. [10.1109/ULIS.2017.7962580].
Investigation of the combined effect of traps and strain on optimized n- and p-type TFETs
Visciarelli, M.;Gnani, E.
;Gnudi, A.;Reggiani, S.;Baccarani, G.
2017
Abstract
A simulation study on the impact of interface traps (ITs) and strain on the I/V characteristics of co-optimized n- and p-type tunnel field-effect transistors (TFETs) realized on the same InAs/Al0.05Ga0.95Sb technology platform is carried out using a full-quantum simulator. In order to capture the effect of interface/border traps on the device electrostatics in a way consistent with the ballistic approach, the classical Shockley-Read-Hall theory has been properly generalized. Traps induce a significant reduction on the ON-current; however, the inclusion of a uniform strain induces a remarkable current enhancement able to completely recover the current degradation.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
