In this work, an InAs Tunnel Field-Effect-Transistor (TFET) is carefully optimized by TCAD simulations. The device is able to provide on-state currents in the mA/m range at a reduced supply voltage of 0.5 V, while keeping the off-state currents below the ITRS specs for HP and LOP devices. Next, the designed TFET is benchmarked with respect to the ITRS specs for advanced multigate transistors projected to year 2020.

Boosting InAs TFET on-current above 1 mA/um with no leakage penalty

BETTI BENEVENTI, GIOVANNI;GNANI, ELENA;GNUDI, ANTONIO;REGGIANI, SUSANNA;BACCARANI, GIORGIO
2013

Abstract

In this work, an InAs Tunnel Field-Effect-Transistor (TFET) is carefully optimized by TCAD simulations. The device is able to provide on-state currents in the mA/m range at a reduced supply voltage of 0.5 V, while keeping the off-state currents below the ITRS specs for HP and LOP devices. Next, the designed TFET is benchmarked with respect to the ITRS specs for advanced multigate transistors projected to year 2020.
2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)
73
76
BETTI BENEVENTI, Giovanni; Gnani, Elena; Gnudi, Antonio; Reggiani, Susanna; Baccarani, Giorgio
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/351921
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