A physics-based analytical model for the on-resistance in the linear transport regime and its application as an alternative tool for the investigation of the hot-carrier stress degradation in shallow-trench-isolation-based laterally diffused MOS devices are presented. The extraction of the model and its validation by comparison with experimental and TCAD data are reported. A thorough investigation of the degradation under low- and high-gate stress biases, corresponding to saturation and impact-ionization regimes, is carried out to gain an insight on the overall bias and temperature dependences of the parameter drifts.

Physics-Based Analytical Model for HCS Degradation in STI-LDMOS Transistors

REGGIANI, SUSANNA;POLI, STEFANO;GNANI, ELENA;GNUDI, ANTONIO;BACCARANI, GIORGIO;
2011

Abstract

A physics-based analytical model for the on-resistance in the linear transport regime and its application as an alternative tool for the investigation of the hot-carrier stress degradation in shallow-trench-isolation-based laterally diffused MOS devices are presented. The extraction of the model and its validation by comparison with experimental and TCAD data are reported. A thorough investigation of the degradation under low- and high-gate stress biases, corresponding to saturation and impact-ionization regimes, is carried out to gain an insight on the overall bias and temperature dependences of the parameter drifts.
S. Reggiani; S. Poli; M. Denison; E. Gnani; A. Gnudi; G. Baccarani; S. Pendharkar; R. Wise
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/106876
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