GAROFALO, ANGELO
GAROFALO, ANGELO
DEI - DIPARTIMENTO DI INGEGNERIA DELL'ENERGIA ELETTRICA E DELL'INFORMAZIONE "GUGLIELMO MARCONI"
Ricercatori a tempo determinato
A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU
2025 Belano, Andrea; Tortorella, Yvan; Garofalo, Angelo; Benini, Luca; Rossi, Davide; Conti, Francesco
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications
2025 Garofalo, Angelo; Ottaviano, Alessandro; Perotti, Matteo; Benz, Thomas; Tortorella, Yvan; Balas, Robert; Rogenmoser, Michael; Zhang, Chi; Bertaccini, Luca; Wistoff, Nils; Ciani, Maicol; Koenig, Cyril; Sinigaglia, Mattia; Valente, Luca; Scheffler, Paul; Eggimann, Manuel; Cavalcante, Matheus; Restuccia, Francesco; Biondi, Alessandro; Conti, Francesco; Gurkaynak, Frank K.; Rossi, Davide; Benini, Luca
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
2025 Silvano, Cristina; Ielmini, Daniele; Ferrandi, Fabrizio; Fiorin, Leandro; Curzel, Serena; Benini, Luca; Conti, Francesco; Garofalo, Angelo; Zambelli, Cristian; Calore, Enrico; Schifano, Sebastiano; Palesi, Maurizio; Ascia, Giuseppe; Patti, Davide; Petra, Nicola; De Caro, Davide; Lavagno, Luciano; Urso, Teodoro; Cardellini, Valeria; Cardarilli, Gian Carlo; Birke, Robert; Perri, Stefania
AXI-REALM: Safe, Modular and Lightweight Traffic Monitoring and Regulation for Heterogeneous Mixed-Criticality Systems
2025 Benz, Thomas; Ottaviano, Alessandro; Liang, Chaoqun; Balas, Robert; Garofalo, Angelo; Restuccia, Francesco; Biondi, Alessandro; Rossi, Davide; Benini, Luca
CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor
2025 Reinwardt, Christopher; Balas, Robert; Ottaviano, Alessandro; Garofalo, Angelo; Benini, Luca
FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators
2025 Isachi, Victor; Nadalini, Alessandro; Gallotta, Riccardo Fiorani; Garofalo, Angelo; Conti, Francesco; Rossi, Davide
Leveraging RISC-V for HW/SW Codesign of Flexible and Efficient TinyML SoCs
2025 Garofalo, Angelo; Benini, Luca
MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
2025 İslamoğlu, Gamze; Bertaccini, Luca; Prasad, Arpan Suravi; Conti, Francesco; Garofalo, Angelo; Benini, Luca
Open Source Heterogeneous SoCs for Artificial Intelligence: The PULP Platform experience
2025 Conti, Francesco; Garofalo, Angelo; Rossi, Davide; Tagliavini, Giuseppe; Benini, Luca
Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications
2025 Cammarata, Danilo; Perotti, Matteo; Bertuletti, Marco; Garofalo, Angelo; Schiavone, Pasquale Davide; Atienza, David; Benini, Luca
RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine
2025 Wiese, Philip; Item, Maurus; Bertaccini, Luca; Tortorella, Yvan; Garofalo, Angelo; Benini, Luca
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing
2024 Conti, Francesco; Paulin, Gianna; Garofalo, Angelo; Rossi, Davide; Di Mauro, Alfio; Rutishauser, Georg; Ottavi, Gianmarco; Eggimann, Manuel; Okuhara, Hayate; Benini, Luca
Unleashing OpenTitan’s Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading
2024 Ciani, Maicol; Parisi, Emanuele; Musa, Alberto; Barchi, Francesco; Bartolini, Andrea; Kulmala, Ari; Psiakis, Rafail; Garofalo, Angelo; Acquaviva, Andrea; Rossi, Davide
vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems
2024 Zelioli, Enrico; Ottaviano, Alessandro; Balas, Robert; Wistoff, Nils; Garofalo, Angelo; Benini, Luca
22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing
2023 Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, Georg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks
2023 Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference
2023 Le Gallo, Manuel; Khaddam-Aljameh, Riduan; Stanisavljevic, Milos; Vasilopoulos, Athanasios; Kersting, Benedikt; Dazzi, Martino; Karunaratne, Geethan; Brändli, Matthias; Singh, Abhairaj; Müller, Silvia M.; Büchel, Julian; Timoneda, Xavier; Joshi, Vinay; Rasch, Malte J.; Egger, Urs; Garofalo, Angelo; Petropoulos, Anastasios; Antonakopoulos, Theodore; Brew, Kevin; Choi, Samuel; Ok, Injo; Philip, Timothy; Chan, Victor; Silvestre, Claire; Ahsan, Ishtiaq; Saulnier, Nicole; Narayanan, Vijay; Francese, Pier Andrea; Eleftheriou, Evangelos; Sebastian, Abu
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case
2023 Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Alessandro Giusti; Davide Rossi; Daniele Palossi
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode
2023 Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays
2023 Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; Francesco Conti; Davide Rossi
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
|---|---|---|---|---|---|---|
| A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU | Belano, Andrea; Tortorella, Yvan; Garofalo, Angelo; Benini, Luca; Rossi, Davide; Conti, Francesco | 2025-01-01 | IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | - | 1.01 Articolo in rivista | - |
| A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications | Garofalo, Angelo; Ottaviano, Alessandro; Perotti, Matteo; Benz, Thomas; Tortorella, Yvan; Balas, ...Robert; Rogenmoser, Michael; Zhang, Chi; Bertaccini, Luca; Wistoff, Nils; Ciani, Maicol; Koenig, Cyril; Sinigaglia, Mattia; Valente, Luca; Scheffler, Paul; Eggimann, Manuel; Cavalcante, Matheus; Restuccia, Francesco; Biondi, Alessandro; Conti, Francesco; Gurkaynak, Frank K.; Rossi, Davide; Benini, Luca | 2025-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS | - | 1.01 Articolo in rivista | TCAS-II-24419-2025_final_submission_manuscript.pdf |
| A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms | Silvano, Cristina; Ielmini, Daniele; Ferrandi, Fabrizio; Fiorin, Leandro; Curzel, Serena; Benini,... Luca; Conti, Francesco; Garofalo, Angelo; Zambelli, Cristian; Calore, Enrico; Schifano, Sebastiano; Palesi, Maurizio; Ascia, Giuseppe; Patti, Davide; Petra, Nicola; De Caro, Davide; Lavagno, Luciano; Urso, Teodoro; Cardellini, Valeria; Cardarilli, Gian Carlo; Birke, Robert; Perri, Stefania | 2025-01-01 | ACM COMPUTING SURVEYS | - | 1.01 Articolo in rivista | ACM_survey.pdf; csur-2023-0499-File002.pdf |
| AXI-REALM: Safe, Modular and Lightweight Traffic Monitoring and Regulation for Heterogeneous Mixed-Criticality Systems | Benz, Thomas; Ottaviano, Alessandro; Liang, Chaoqun; Balas, Robert; Garofalo, Angelo; Restuccia, ...Francesco; Biondi, Alessandro; Rossi, Davide; Benini, Luca | 2025-01-01 | IEEE TRANSACTIONS ON COMPUTERS | - | 1.01 Articolo in rivista | - |
| CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor | Reinwardt, Christopher; Balas, Robert; Ottaviano, Alessandro; Garofalo, Angelo; Benini, Luca | 2025-01-01 | - | Association for Computing Machinery, Inc | 4.01 Contributo in Atti di convegno | - |
| FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators | Isachi, Victor; Nadalini, Alessandro; Gallotta, Riccardo Fiorani; Garofalo, Angelo; Conti, France...sco; Rossi, Davide | 2025-01-01 | - | Association for Computing Machinery, Inc | 4.01 Contributo in Atti di convegno | - |
| Leveraging RISC-V for HW/SW Codesign of Flexible and Efficient TinyML SoCs | Garofalo, Angelo; Benini, Luca | 2025-01-01 | IEEE DESIGN & TEST | - | 1.01 Articolo in rivista | - |
| MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products | İslamoğlu, Gamze; Bertaccini, Luca; Prasad, Arpan Suravi; Conti, Francesco; Garofalo, Angelo; Be...nini, Luca | 2025-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
| Open Source Heterogeneous SoCs for Artificial Intelligence: The PULP Platform experience | Conti, Francesco; Garofalo, Angelo; Rossi, Davide; Tagliavini, Giuseppe; Benini, Luca | 2025-01-01 | IEEE SOLID-STATE CIRCUITS MAGAZINE | - | 1.01 Articolo in rivista | - |
| Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications | Cammarata, Danilo; Perotti, Matteo; Bertuletti, Marco; Garofalo, Angelo; Schiavone, Pasquale Davi...de; Atienza, David; Benini, Luca | 2025-01-01 | - | Association for Computing Machinery, Inc | 4.01 Contributo in Atti di convegno | - |
| RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine | Wiese, Philip; Item, Maurus; Bertaccini, Luca; Tortorella, Yvan; Garofalo, Angelo; Benini, Luca | 2025-01-01 | - | Association for Computing Machinery, Inc | 4.01 Contributo in Atti di convegno | - |
| Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing | Conti, Francesco; Paulin, Gianna; Garofalo, Angelo; Rossi, Davide; Di Mauro, Alfio; Rutishauser, ...Georg; Ottavi, Gianmarco; Eggimann, Manuel; Okuhara, Hayate; Benini, Luca | 2024-01-01 | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - | 1.01 Articolo in rivista | Binder3.pdf |
| Unleashing OpenTitan’s Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading | Ciani, Maicol; Parisi, Emanuele; Musa, Alberto; Barchi, Francesco; Bartolini, Andrea; Kulmala, Ar...i; Psiakis, Rafail; Garofalo, Angelo; Acquaviva, Andrea; Rossi, Davide | 2024-01-01 | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | - | 1.01 Articolo in rivista | - |
| vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems | Zelioli, Enrico; Ottaviano, Alessandro; Balas, Robert; Wistoff, Nils; Garofalo, Angelo; Benini, Luca | 2024-01-01 | - | Institute of Electrical and Electronics Engineers Inc. | 4.01 Contributo in Atti di convegno | - |
| 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing | Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, G...eorg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca | 2023-01-01 | - | - | 4.01 Contributo in Atti di convegno | - |
| A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks | Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | a+3+tops+w+risc+post+print+.pdf |
| A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference | Le Gallo, Manuel; Khaddam-Aljameh, Riduan; Stanisavljevic, Milos; Vasilopoulos, Athanasios; Kerst...ing, Benedikt; Dazzi, Martino; Karunaratne, Geethan; Brändli, Matthias; Singh, Abhairaj; Müller, Silvia M.; Büchel, Julian; Timoneda, Xavier; Joshi, Vinay; Rasch, Malte J.; Egger, Urs; Garofalo, Angelo; Petropoulos, Anastasios; Antonakopoulos, Theodore; Brew, Kevin; Choi, Samuel; Ok, Injo; Philip, Timothy; Chan, Victor; Silvestre, Claire; Ahsan, Ishtiaq; Saulnier, Nicole; Narayanan, Vijay; Francese, Pier Andrea; Eleftheriou, Evangelos; Sebastian, Abu | 2023-01-01 | NATURE ELECTRONICS | - | 1.01 Articolo in rivista | Hermes___A_64_core_in_memory_compute_chip_based_on_14nm_CMOS_and_phase_change_memory_for_deep_learning_inference.pdf |
| Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case | Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Ales...sandro Giusti; Davide Rossi; Daniele Palossi | 2023-01-01 | IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS | IEEE | 4.01 Contributo in Atti di convegno | cyber security ciani post print.pdf |
| Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode | Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Ben...ini; Davide Rossi | 2023-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | 2201.08656.pdf |
| ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays | Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; F...rancesco Conti; Davide Rossi | 2023-01-01 | IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS | IEEE | 4.01 Contributo in Atti di convegno | - |