GAROFALO, ANGELO

GAROFALO, ANGELO  

DIPARTIMENTO DI INGEGNERIA DELL'ENERGIA ELETTRICA E DELL'INFORMAZIONE "GUGLIELMO MARCONI"  

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Titolo Autore(i) Anno Periodico Editore Tipo File
22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, G...eorg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca 2023-01-01 - - 4.01 Contributo in Atti di convegno -
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode Garofalo A.; Ottavi G.; Di Mauro A.; Conti F.; Tagliavini G.; Benini L.; Rossi D. 2021-01-01 - Institute of Electrical and Electronics Engineers Inc. 4.01 Contributo in Atti di convegno DUSTIN_REDUX.pdf
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D 2023-01-01 - IEEE 4.01 Contributo in Atti di convegno a 3 tops w risc post print .pdf
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference Le Gallo, Manuel; Khaddam-Aljameh, Riduan; Stanisavljevic, Milos; Vasilopoulos, Athanasios; Kerst...ing, Benedikt; Dazzi, Martino; Karunaratne, Geethan; Brändli, Matthias; Singh, Abhairaj; Müller, Silvia M.; Büchel, Julian; Timoneda, Xavier; Joshi, Vinay; Rasch, Malte J.; Egger, Urs; Garofalo, Angelo; Petropoulos, Anastasios; Antonakopoulos, Theodore; Brew, Kevin; Choi, Samuel; Ok, Injo; Philip, Timothy; Chan, Victor; Silvestre, Claire; Ahsan, Ishtiaq; Saulnier, Nicole; Narayanan, Vijay; Francese, Pier Andrea; Eleftheriou, Evangelos; Sebastian, Abu 2023-01-01 NATURE ELECTRONICS - 1.01 Articolo in rivista -
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks Garofalo, A; Ottavi, G; Conti, F; Karunaratne, G; Boybat, I; Benini, L; Rossi, D 2022-01-01 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS - 1.01 Articolo in rivista Heterogeneous In-Memory Computing_aam_.pdf
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics Montagna F.; Mach S.; Benatti S.; Garofalo A.; Ottavi G.; Benini L.; Rossi D.; Tagliavini G. 2022-01-01 IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS - 1.01 Articolo in rivista Low-Power_Transprecision_Cluster_pp.pdf
A mixed-precision RISC-V processor for extreme-edge DNN inference Ottavi G.; Garofalo A.; Tagliavini G.; Conti F.; Benini L.; Rossi D. 2020-01-01 - IEEE Computer Society 4.01 Contributo in Atti di convegno ISVLSI_STATUS_BASED.pdf
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Ales...sandro Giusti; Davide Rossi; Daniele Palossi 2023-01-01 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS IEEE 4.01 Contributo in Atti di convegno cyber security ciani post print.pdf
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training Angelo Garofalo; Matteo Perotti; Luca Valente; Yvan Tortorella; Alessandro Nadalini; Luca Benini;... Davide Rossi; Francesco Conti 2022-01-01 - - 4.01 Contributo in Atti di convegno -
Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training Garofalo, Angelo; Tortorella, Yvan; Perotti, Matteo; Valente, Luca; Nadalini, Alessandro; Benini,... Luca; Rossi, Davide; Conti, Francesco 2022-01-01 IEEE OPEN JOURNAL OF SOLID-STATE CIRCUITS - 1.01 Articolo in rivista Darkside_A_Heterogeneous_RISC-V_Compute_Cluster_for_Extreme-Edge_On-Chip_DNN_Inference_and_Training.pdf
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs Burrello, Alessio; Garofalo, Angelo; Bruschi, Nazareno; Tagliavini, Giuseppe; Rossi, Davide; Cont...i, Francesco 2021-01-01 IEEE TRANSACTIONS ON COMPUTERS - 1.01 Articolo in rivista 2008.0127pp.pdf
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Ben...ini; Davide Rossi 2023-01-01 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS - 1.01 Articolo in rivista 2201.08656.pdf
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; F...rancesco Conti; Davide Rossi 2023-01-01 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS IEEE 4.01 Contributo in Atti di convegno -
Enabling mixed-precision quantized neural networks in extreme-edge devices Nazareno Bruschi, Angelo Garofalo, Francesco Conti, Giuseppe Tagliavini, Davide Rossi 2020-01-01 - Association for Computing Machinery, Inc 4.01 Contributo in Atti di convegno Enabling_Mixed_Precision_Quantized_Neural_Networks_in_Extreme_Edge_Devices.pdf
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini..., Luca; Rossi, Davide 2023-01-01 - IEEE 4.01 Contributo in Atti di convegno IMA_RESNET_DATE_postprint.pdf
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers Islamoglu, Gamze; Scherer, Moritz; Paulin, Gianna; Fischer, Tim; Jung, Victor J.B.; Garofalo, Ang...elo; Benini, Luca 2023-01-01 - IEEE 4.01 Contributo in Atti di convegno -
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing Francesco Conti; Gianna Paulin; Angelo Garofalo; Davide Rossi; Alfio Di Mauro; Georg Rutishauser;... Gianmarco Ottavi; Manuel Eggimann; Hayate Okuhara; Luca Benini 2023-01-01 IEEE JOURNAL OF SOLID-STATE CIRCUITS - 1.01 Articolo in rivista Binder3.pdf
On-line testing for autonomous systems driven by RISC-V processor design verification Ruospo A.; Cantoro R.; Sanchez E.; Schiavone P.D.; Garofalo A.; Benini L. 2019-01-01 - Institute of Electrical and Electronics Engineers Inc. 4.01 Contributo in Atti di convegno -
PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters Garofalo A.; Rusci M.; Conti F.; Rossi D.; Benini L. 2019-01-01 - Institute of Electrical and Electronics Engineers Inc. 4.01 Contributo in Atti di convegno Postprint_PULP-NN_A Computing Library.pdf
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors Garofalo A.; Rusci M.; Conti F.; Rossi D.; Benini L. 2020-01-01 PHILOSOPHICAL TRANSACTIONS OF THE ROYAL SOCIETY OF LONDON SERIES A: MATHEMATICAL PHYSICAL AND ENGINEERING SCIENCES - 1.01 Articolo in rivista Binder1.pdf