Sfoglia per Autore
Transactions on Computers
2006 J. C. Lo; C. Metra; F. Lombardi
Testing Reversible 1D Arrays of Molecular QCA
2006 X. Ma; J. Huang; C. Metra; F. Lombardi
Can Clock Faults Be Detected Through Functional Test ?
2006 C. Metra; D. Rossi; M. Omaña; J.M. Cazeaux; TM Mak
A Novel Dual-Walled CNT Bus Architecture with Reduced Cross-Coupling Features
2006 J.M. Cazeaux; D. Rossi; C. Metra; F. Lombardi
Welcome
2006 C. Metra; M. Nicolaidis; R. Leveugle; R. Aitken
Proceedings 12th IEEE International On-Line Testing Symposium
2006 R. Leveugle; R. Aitken; C. Metra; M. Nicolaidis
Analysis of the Impact of Bus Implemented EDCs on On-Chip SSN
2006 D. Rossi; C. Steiner; C. Metra
Low-Cost and Highly Reliable Detector for Transient and Crosstalk Faults Affecting FPGA Interconnects
2006 M. Omaña; J.M. Cazeaux; D. Rossi; C. Metra
Path (Min) delay Faults and Their Impact on Self-Checking Circuits' Operation
2006 C. Metra; M. Omaña; D. Rossi; J.M. Cazeaux; TM Mak
12th IEEE International On-Line Testing Symposium
2006 C. Metra; M. Nicolaidis; R. Leveugle; R. Aitken
Checker No-Harm Alarm Robustness
2006 D. Rossi; M. Omaña; C. Metra; A. Pagni
Configurable Error Control Scheme for NoC Signal Integrity
2007 D. Rossi; P. Angelini; C. Metra
Modeling Crosstalk Effects in CNT Bus Architectures
2007 D. Rossi; J. M. Cazeaux; C. Metra; F. Lombardi
Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?
2007 C. Metra; D. Rossi; TM Mak
Reversible and Testable Circuits for Molecular QCA Design
2007 X. Ma; J. Huang; C. Metra; F. Lombardi
Novel Approach to Clock Fault Testing for High Performance Microprocessors
2007 C. Metra; M. Omaña; TM Mak; S. Tam
Testing Reversible One-Dimensional QCA Arrays for Multiple Faults
2007 X. Ma; J. Huang; C. Metra; F. Lombardi
Novel Compensation Scheme for Local Clocks of High Performance Microprocessors
2007 C. Metra; M. Omaña; TM Mak; S. Tam
Pulse Propagation for the Detection of Small Delay Defects
2007 M. Favalli; C. Metra
Guest Editors' Introduction: The State of the Art in Nanoscale CAD
2007 F. Lombardi; C. Metra
Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
---|---|---|---|---|---|---|
Transactions on Computers | J. C. Lo; C. Metra; F. Lombardi | 2006-01-01 | - | IEEE | 3.02 Curatela | - |
Testing Reversible 1D Arrays of Molecular QCA | X. Ma; J. Huang; C. Metra; F. Lombardi | 2006-01-01 | - | N. Park, H. Ito, A. Salsano, N. Touba | 4.01 Contributo in Atti di convegno | - |
Can Clock Faults Be Detected Through Functional Test ? | C. Metra; D. Rossi; M. Omaña; J.M. Cazeaux; TM Mak | 2006-01-01 | - | B. Straube, O. Novak | 4.01 Contributo in Atti di convegno | - |
A Novel Dual-Walled CNT Bus Architecture with Reduced Cross-Coupling Features | J.M. Cazeaux; D. Rossi; C. Metra; F. Lombardi | 2006-01-01 | - | C. Lau, D. Janes, S. Bandyopadhyay, M. Cahay | 4.01 Contributo in Atti di convegno | - |
Welcome | C. Metra; M. Nicolaidis; R. Leveugle; R. Aitken | 2006-01-01 | - | C. Metra, M. Nicolaidis, R. Leveugle, R. Aitken | 2.04 Breve introduzione | - |
Proceedings 12th IEEE International On-Line Testing Symposium | R. Leveugle; R. Aitken; C. Metra; M. Nicolaidis | 2006-01-01 | - | IEEE | 3.02 Curatela | - |
Analysis of the Impact of Bus Implemented EDCs on On-Chip SSN | D. Rossi; C. Steiner; C. Metra | 2006-01-01 | - | D. Sciuto, G. Gielen | 4.01 Contributo in Atti di convegno | - |
Low-Cost and Highly Reliable Detector for Transient and Crosstalk Faults Affecting FPGA Interconnects | M. Omaña; J.M. Cazeaux; D. Rossi; C. Metra | 2006-01-01 | - | D. Sciuto, G. Gielen | 4.01 Contributo in Atti di convegno | - |
Path (Min) delay Faults and Their Impact on Self-Checking Circuits' Operation | C. Metra; M. Omaña; D. Rossi; J.M. Cazeaux; TM Mak | 2006-01-01 | - | C. Metra, M. Nicolaidis, R. Aitken, R. Leveugle | 4.01 Contributo in Atti di convegno | - |
12th IEEE International On-Line Testing Symposium | C. Metra; M. Nicolaidis; R. Leveugle; R. Aitken | 2006-01-01 | - | - | 7.12 Attività espositiva:Mostra o Esposizione | - |
Checker No-Harm Alarm Robustness | D. Rossi; M. Omaña; C. Metra; A. Pagni | 2006-01-01 | - | C. Metra, M. Nicolaidis, R. Aitken, R. Leveugle | 4.01 Contributo in Atti di convegno | - |
Configurable Error Control Scheme for NoC Signal Integrity | D. Rossi; P. Angelini; C. Metra | 2007-01-01 | - | M. Nicolaidis, A. Paschalis | 4.01 Contributo in Atti di convegno | - |
Modeling Crosstalk Effects in CNT Bus Architectures | D. Rossi; J. M. Cazeaux; C. Metra; F. Lombardi | 2007-01-01 | IEEE TRANSACTIONS ON NANOTECHNOLOGY | - | 1.01 Articolo in rivista | - |
Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality? | C. Metra; D. Rossi; TM Mak | 2007-01-01 | IEEE TRANSACTIONS ON COMPUTERS | - | 1.01 Articolo in rivista | - |
Reversible and Testable Circuits for Molecular QCA Design | X. Ma; J. Huang; C. Metra; F. Lombardi | 2007-01-01 | - | Springer US | 2.01 Capitolo / saggio in libro | - |
Novel Approach to Clock Fault Testing for High Performance Microprocessors | C. Metra; M. Omaña; TM Mak; S. Tam | 2007-01-01 | - | P. Prinetto, H. Wunderlich | 4.01 Contributo in Atti di convegno | - |
Testing Reversible One-Dimensional QCA Arrays for Multiple Faults | X. Ma; J. Huang; C. Metra; F. Lombardi | 2007-01-01 | - | C. Bolchini, Y-B Kim, A. Salsano, N. Touba | 4.01 Contributo in Atti di convegno | - |
Novel Compensation Scheme for Local Clocks of High Performance Microprocessors | C. Metra; M. Omaña; TM Mak; S. Tam | 2007-01-01 | - | J. E. Sibert, D. Young | 4.01 Contributo in Atti di convegno | - |
Pulse Propagation for the Detection of Small Delay Defects | M. Favalli; C. Metra | 2007-01-01 | - | R. Lauwereins, D. Sciuto | 4.01 Contributo in Atti di convegno | - |
Guest Editors' Introduction: The State of the Art in Nanoscale CAD | F. Lombardi; C. Metra | 2007-01-01 | IEEE DESIGN & TEST OF COMPUTERS | - | 1.01 Articolo in rivista | - |
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