Sfoglia per Autore
Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode
2022 Rossi D.; Conti F.; Eggiman M.; Mauro A.D.; Tagliavini G.; Mach S.; Guermandi M.; Pullini A.; Loi I.; Chen J.; Flamand E.; Benini L.
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics
2022 Montagna F.; Mach S.; Benatti S.; Garofalo A.; Ottavi G.; Benini L.; Rossi D.; Tagliavini G.
Optimizing Random Forest Based Inference on RISC-V MCUs at the Extreme Edge
2022 Tabanelli E.; Tagliavini G.; Benini L.
Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference
2022 Bruschi N.; Tagliavini G.; Conti F.; Abadal S.; Cabellos-Aparicio A.; Alarcon E.; Karunaratne G.; Boybat I.; Benini L.; Rossi D.
PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning
2022 Nadalini D.; Rusci M.; Tagliavini G.; Ravaglia L.; Benini L.; Conti F.
TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes
2023 Mirsalari, Seyed Ahmad; Tagliavini, Giuseppe; Rossi, Davide; Benini, Luca
Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters
2023 Chen J.; Loi I.; Flamand E.; Tagliavini G.; Benini L.; Rossi D.
ANGELS - Smart Steering Wheel for Driver Safety
2023 Amidei, Andrea; Rapa, Pierangelo Maria; Tagliavini, Giuseppe; Rabbeni, Roberto; Pavan, Paolo; Benatti, Simone
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC
2023 Valente, Luca; Tortorella, Yvan; Sinigaglia, Mattia; Tagliavini, Giuseppe; Capotondi, Alessandro; Benini, Luca; Rossi, Davide
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture
2023 Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini, Luca; Rossi, Davide
RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor
2023 Barchi F.; Pasini G.; Parisi E.; Tagliavini G.; Bartolini A.; Acquaviva A.
DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors
2023 Tabanelli, Enrico; Tagliavini, Giuseppe; Benini, Luca
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode
2023 Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi
Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms
2023 Mirsalari, Seyed Ahmad; Yousefzadeh, Saba; Tagliavini, Giuseppe; Stathis, Dimitrios; Hemani, Ahmed
An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing
2023 Mazzoni B.; Tagliavini G.; Benini L.; Benatti S.
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
|---|---|---|---|---|---|---|
| Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode | Rossi D.; Conti F.; Eggiman M.; Mauro A.D.; Tagliavini G.; Mach S.; Guermandi M.; Pullini A.; Loi... I.; Chen J.; Flamand E.; Benini L. | 2022-01-01 | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - | 1.01 Articolo in rivista | VEGA_redux.pdf |
| A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics | Montagna F.; Mach S.; Benatti S.; Garofalo A.; Ottavi G.; Benini L.; Rossi D.; Tagliavini G. | 2022-01-01 | IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS | - | 1.01 Articolo in rivista | Low-Power_Transprecision_Cluster_pp.pdf |
| Optimizing Random Forest Based Inference on RISC-V MCUs at the Extreme Edge | Tabanelli E.; Tagliavini G.; Benini L. | 2022-01-01 | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | - | 1.01 Articolo in rivista | TCAD_RF_postprint.pdf |
| Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference | Bruschi N.; Tagliavini G.; Conti F.; Abadal S.; Cabellos-Aparicio A.; Alarcon E.; Karunaratne G.;... Boybat I.; Benini L.; Rossi D. | 2022-01-01 | - | - | 4.01 Contributo in Atti di convegno | iris_aicas_2022.pdf |
| PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning | Nadalini D.; Rusci M.; Tagliavini G.; Ravaglia L.; Benini L.; Conti F. | 2022-01-01 | - | Springer | 4.01 Contributo in Atti di convegno | PULP-TrainLib - Springer Version.pdf |
| TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes | Mirsalari, Seyed Ahmad; Tagliavini, Giuseppe; Rossi, Davide; Benini, Luca | 2023-01-01 | - | - | 4.02 Riassunto (Abstract) | - |
| Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters | Chen J.; Loi I.; Flamand E.; Tagliavini G.; Benini L.; Rossi D. | 2023-01-01 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - | 1.01 Articolo in rivista | scalable hierarchical instruction post print.pdf |
| ANGELS - Smart Steering Wheel for Driver Safety | Amidei, Andrea; Rapa, Pierangelo Maria; Tagliavini, Giuseppe; Rabbeni, Roberto; Pavan, Paolo; Ben...atti, Simone | 2023-01-01 | - | - | 4.01 Contributo in Atti di convegno | IEEE_IWASI_2023_postprint.pdf |
| HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC | Valente, Luca; Tortorella, Yvan; Sinigaglia, Mattia; Tagliavini, Giuseppe; Capotondi, Alessandro;... Benini, Luca; Rossi, Davide | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | HULK-V_a_Heterogeneous_Ultra-low-power_Linux_capable_RISC-V_SoC-accepted.pdf |
| End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture | Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini..., Luca; Rossi, Davide | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | IMA_RESNET_DATE_postprint.pdf |
| RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor | Barchi F.; Pasini G.; Parisi E.; Tagliavini G.; Bartolini A.; Acquaviva A. | 2023-01-01 | - | Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing | 4.01 Contributo in Atti di convegno | - |
| DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors | Tabanelli, Enrico; Tagliavini, Giuseppe; Benini, Luca | 2023-01-01 | ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS | - | 1.01 Articolo in rivista | DNNIsNotAllYouNeed.pdf |
| Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode | Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Ben...ini; Davide Rossi | 2023-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | 2201.08656.pdf |
| Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms | Mirsalari, Seyed Ahmad; Yousefzadeh, Saba; Tagliavini, Giuseppe; Stathis, Dimitrios; Hemani, Ahmed | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | ICECS_2023__Bacterial_Genome_Identification_Using_Self_Organizing_Map_implemented_on_the_GAP9_POSTPRINT.pdf |
| An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing | Mazzoni B.; Tagliavini G.; Benini L.; Benatti S. | 2023-01-01 | - | Springer | 4.01 Contributo in Atti di convegno | ECG_Efficient_ postprint.pdf |
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