In this work we present an investigation on a novel device concept meant to achieve a steep subthreshold slope by filtering out high-energy electrons entering the device channel. The filtering function is entrusted to a superlattice in the source extension region, which could possibly be fabricated by deposition of a number of appropriate semiconductor layers within a manufacturing process of vertical nanowires. Simulation results indicate that an SS = 26 mV/dec can be achieved using GaAs/AlGaAs as the constituent materials of the superlattice.
E. Gnani, S. Reggiani, A. Gnudi, G. Baccarani (2010). Steep-Slope Nanowire FET with a Superlattice in the Source Extension. SEVILLE : IEEE [10.1109/ESSDERC.2010.5618207].
Steep-Slope Nanowire FET with a Superlattice in the Source Extension
GNANI, ELENA;REGGIANI, SUSANNA;GNUDI, ANTONIO;BACCARANI, GIORGIO
2010
Abstract
In this work we present an investigation on a novel device concept meant to achieve a steep subthreshold slope by filtering out high-energy electrons entering the device channel. The filtering function is entrusted to a superlattice in the source extension region, which could possibly be fabricated by deposition of a number of appropriate semiconductor layers within a manufacturing process of vertical nanowires. Simulation results indicate that an SS = 26 mV/dec can be achieved using GaAs/AlGaAs as the constituent materials of the superlattice.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
