Thickness-dependent dielectric breakdown in thick amorphous SiO2 capacitors

High-voltage dielectric breakdown of thick amorphous silicon dioxide capacitors for galvanic insulation is experimentally investigated and analyzed through numerical simulations carried out with a commercial TCAD tool. Silicon oxide metal-insulator–metal capacitors are used as back-end inter-level dielectric layers in integrated circuits. The large biases such devices must sustain and the material intrinsic defectivity give rise to a leakage current which is responsible of degradation and failure. Therefore, the understanding of the degradation mechanisms of the insulator is an essential prerequisite for its safe operation. For this reason, high-voltage dielectric breakdown measurements have been performed under DC-stress conditions on thick metal-insulator–metal structures with different oxide thickness and, in order to gain insight on the role of defects on breakdown, numerical simulations have been compared to experiments.