KAKOEE, MOHAMMAD REZA
KAKOEE, MOHAMMAD REZA
DIPARTIMENTO DI INGEGNERIA DELL'ENERGIA ELETTRICA E DELL'INFORMAZIONE "GUGLIELMO MARCONI"
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Risultati 1 - 15 di 15 (tempo di esecuzione: 0.023 secondi).
A distributed and topology-agnostic approach for on-line NoC testing
2011 Kakoee M.R.; Bertacco V.; Benini L.
A fully-synthesizable single-cycle interconnection network for Shared-L1 processor clusters
2011 Rahimi A. ; Loi I. ; Kakoee M.R. ; Benini L.
A Multi-banked Shared-L1 Cache Architecture for Tightly Coupled Processor Clusters
2012 M. R. Kakoee; V. Petrovic; L. Benini
A new physical routing approach for robust bundled signaling on NoC links
2010 M. R. Kakoee; I. Loi; L. Benini
A resilient architecture for low latency communication in shared-L1 processor clusters
2012 Kakoee M.R.; Loi I. ; Benini L.
A shared-FPU architecture for ultra-low power MPSoCs, Proceedings of the ACM International Conference on Computing Frontiers - CF '13
2013 Mohammad Reza Kakoee;Igor Loi;Luca Benini
A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators
2012 M. Dehyadegari; A. Marongiu; M. R. Kakoee; L. Benini; S. Mohammadi; N. Yazdani
Architecture support for tightly-coupled multi-core clusters with shared-memory HW accelerators
2015 Dehyadegari, Masoud; Marongiu, Andrea; Kakoee, Mohammad Reza; Mohammadi, Siamak; Yazdani, Naser; Benini, Luca
Automatic synthesis of near-threshold circuits with fine-grained performance tunability
2010 Kakoee M.R. ; Sathanur A. ; Pullini A. ; Huisken J. ; Benini L.
Fine-Grained Power and Body-Bias Control for Near-Threshold Deep Sub-Micron CMOS Circuits
2011 Kakoee M.R.; Benini L.
Moonrake chip - GALS demonstrator in 40 nm CMOS technology
2011 Krstic M. ; Fan X. ; Grass E. ; Heer C. ; Sanders B. ; Benini L. ; Kakoee M.R. ; Strano A. ; Bertozzi D.
ReliNoC: A reliable network for priority-based on-chip communication
2011 Kakoee M.R. ; Bertacco V. ; Benini L.
Robust Near-Threshold Design With Fine-Grained Performance Tunability
2012 Kakoee M.R.; Benini L.
Row-based FBB: A design-time optimization for post-silicon tunable circuits
2012 M. R. Kakoee; A. Sathanur; A. Pullini; L. Benini
Variation-Tolerant Architecture for Ultra Low Power Shared-L1 Processor Clusters
2012 Mohammad Reza Kakoee; Igor Loi; Luca Benini
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
|---|---|---|---|---|---|---|
| A distributed and topology-agnostic approach for on-line NoC testing | Kakoee M.R.; Bertacco V.; Benini L. | 2011-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| A fully-synthesizable single-cycle interconnection network for Shared-L1 processor clusters | Rahimi A. ; Loi I. ; Kakoee M.R. ; Benini L. | 2011-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| A Multi-banked Shared-L1 Cache Architecture for Tightly Coupled Processor Clusters | M. R. Kakoee; V. Petrovic; L. Benini | 2012-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| A new physical routing approach for robust bundled signaling on NoC links | M. R. Kakoee; I. Loi; L. Benini | 2010-01-01 | - | ACM | 4.01 Contributo in Atti di convegno | - |
| A resilient architecture for low latency communication in shared-L1 processor clusters | Kakoee M.R.; Loi I. ; Benini L. | 2012-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| A shared-FPU architecture for ultra-low power MPSoCs, Proceedings of the ACM International Conference on Computing Frontiers - CF '13 | Mohammad Reza Kakoee;Igor Loi;Luca Benini | 2013-01-01 | - | - | 4.01 Contributo in Atti di convegno | - |
| A Tightly-Coupled Multi-Core Cluster with Shared-Memory HW Accelerators | M. Dehyadegari; A. Marongiu; M. R. Kakoee; L. Benini; S. Mohammadi; N. Yazdani | 2012-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| Architecture support for tightly-coupled multi-core clusters with shared-memory HW accelerators | Dehyadegari, Masoud; Marongiu, Andrea; Kakoee, Mohammad Reza; Mohammadi, Siamak; Yazdani, Naser; ...Benini, Luca | 2015-01-01 | IEEE TRANSACTIONS ON COMPUTERS | - | 1.01 Articolo in rivista | - |
| Automatic synthesis of near-threshold circuits with fine-grained performance tunability | Kakoee M.R. ; Sathanur A. ; Pullini A. ; Huisken J. ; Benini L. | 2010-01-01 | - | ACM/IEEE | 4.01 Contributo in Atti di convegno | - |
| Fine-Grained Power and Body-Bias Control for Near-Threshold Deep Sub-Micron CMOS Circuits | Kakoee M.R.; Benini L. | 2011-01-01 | IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS | - | 1.01 Articolo in rivista | - |
| Moonrake chip - GALS demonstrator in 40 nm CMOS technology | Krstic M. ; Fan X. ; Grass E. ; Heer C. ; Sanders B. ; Benini L. ; Kakoee M.R. ; Strano A. ; Bert...ozzi D. | 2011-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| ReliNoC: A reliable network for priority-based on-chip communication | Kakoee M.R. ; Bertacco V. ; Benini L. | 2011-01-01 | - | IEEE Press | 4.01 Contributo in Atti di convegno | - |
| Robust Near-Threshold Design With Fine-Grained Performance Tunability | Kakoee M.R.; Benini L. | 2012-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | - |
| Row-based FBB: A design-time optimization for post-silicon tunable circuits | M. R. Kakoee; A. Sathanur; A. Pullini; L. Benini | 2012-01-01 | MICROELECTRONICS JOURNAL | - | 1.01 Articolo in rivista | - |
| Variation-Tolerant Architecture for Ultra Low Power Shared-L1 Processor Clusters | Mohammad Reza Kakoee; Igor Loi; Luca Benini | 2012-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS | - | 1.01 Articolo in rivista | - |