We propose a low cost and low intrusive approach to test on line the scheduler of high performance microprocessors. Differently from traditional approaches, it is based on looking for the information redundancy that the scheduler inherently has due to its performed functionality, rather than adding such a redundancy for on line test purposes.

Low Cost and Low Intrusive Approach to Test On-Line the Scheduler of High Performance Microprocessors

ROSSI, DANIELE;OMANA, MARTIN EUGENIO;METRA, CECILIA;
2010

Abstract

We propose a low cost and low intrusive approach to test on line the scheduler of high performance microprocessors. Differently from traditional approaches, it is based on looking for the information redundancy that the scheduler inherently has due to its performed functionality, rather than adding such a redundancy for on line test purposes.
Proceedings of 2010 ACM International Conference on Computing Frontiers
113
114
D. Rossi; M. Omaña; G. Berghella; C. Metra; A. Jas; T. Chandra; R. Galivanche
File in questo prodotto:
Eventuali allegati, non sono esposti

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11585/99037
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 2
  • ???jsp.display-item.citation.isi??? 0
social impact