In this paper we propose an on-die monitoring scheme to detect and count transient faults (TFs) resulting, as well as not resulting in output SEs, affecting the inputs of data-path latches/flip-flops. This approach allows an early monitoring of the latches/flip-flops vulnerability to TFs, thus discovering intrinsic weaknesses of design or process. The proposed monitoring scheme features a very low impact on area overhead and power consumption, thus being suitable to be deployed within any IC.

Transient Fault and Soft Error On-Die Monitoring Scheme

ROSSI, DANIELE;OMANA, MARTIN EUGENIO;METRA, CECILIA
2010

Abstract

In this paper we propose an on-die monitoring scheme to detect and count transient faults (TFs) resulting, as well as not resulting in output SEs, affecting the inputs of data-path latches/flip-flops. This approach allows an early monitoring of the latches/flip-flops vulnerability to TFs, thus discovering intrinsic weaknesses of design or process. The proposed monitoring scheme features a very low impact on area overhead and power consumption, thus being suitable to be deployed within any IC.
Proceedings of The 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
391
398
D. Rossi; M. Omaña; C. Metra
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11585/99032
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