This paper presents a detailed thermal analysis of nanoscale FinFET devices. A three-dimensional electro-thermal device simulator, calibrated against Monte Carlo simulations at various temperatures, is adopted in order to study self-heating effects in Fin-FETs, and their dependence on geometrical parameters such as buried oxide thickness, source/drain extension length, fin-pitch and fin height.
Simulation of self-heating effects in 30 nm gate length FinFET / M. Braccioli; G. Curatola; Y. Yang; E. Sangiorgi; C. Fiegna. - STAMPA. - (2008), pp. 71-74. (Intervento presentato al convegno 9th International Conference on Ultimate Integration on Silicon - ULIS 2008 tenutosi a Udine nel 13-14 marzo 2008).
Simulation of self-heating effects in 30 nm gate length FinFET
BRACCIOLI, MARCO;SANGIORGI, ENRICO;FIEGNA, CLAUDIO
2008
Abstract
This paper presents a detailed thermal analysis of nanoscale FinFET devices. A three-dimensional electro-thermal device simulator, calibrated against Monte Carlo simulations at various temperatures, is adopted in order to study self-heating effects in Fin-FETs, and their dependence on geometrical parameters such as buried oxide thickness, source/drain extension length, fin-pitch and fin height.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
