This paper presents a detailed thermal analysis of nanoscale FinFET devices. A three-dimensional electro-thermal device simulator, calibrated against Monte Carlo simulations at various temperatures, is adopted in order to study self-heating effects in Fin-FETs, and their dependence on geometrical parameters such as buried oxide thickness, source/drain extension length, fin-pitch and fin height.
M. Braccioli, G. Curatola, Y. Yang, E. Sangiorgi, C. Fiegna (2008). Simulation of self-heating effects in 30 nm gate length FinFET. PISCATAWAY, NJ 08855-1331 : IEEE.
Simulation of self-heating effects in 30 nm gate length FinFET
BRACCIOLI, MARCO;SANGIORGI, ENRICO;FIEGNA, CLAUDIO
2008
Abstract
This paper presents a detailed thermal analysis of nanoscale FinFET devices. A three-dimensional electro-thermal device simulator, calibrated against Monte Carlo simulations at various temperatures, is adopted in order to study self-heating effects in Fin-FETs, and their dependence on geometrical parameters such as buried oxide thickness, source/drain extension length, fin-pitch and fin height.File in questo prodotto:
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