Tunnel FETs (TFETs) are promising alternatives to the conventional CMOS technology for steeper-than-60mV/dec subthreshold slopes (SS) required to limit power consumption of integrated circuits [1]. Current challenges for TFET integration into practical circuit applications include reaching acceptable ION levels, suppressing ambipolar effects, improving output characteristics [2], and simultaneously co-integrating optimized n-and p-type devices. All of these issues are carefully taken into account in this work. Device- and circuit-level design of TFET inverters is proposed, based on co-optimized n-and p-type TFETs integrated on the same InAs/ Al0.05Ga0.95Sb platform. A full-band quantum simulation approach is adopted to properly account for quantum effects which strongly influence TFET device, and hence circuit, performance. This advances the state of the art of TFET-based circuit literature, which is mostly based on simplified TCAD models [3], with rare calibrations against atomistic calculations [4].

E. Baravelli, E. Gnani, A. Gnudi, S. Reggiani, G. Baccarani (2013). Full-quantum simulation of heterojunction TFET inverters providing better performance than multi-gate CMOS at sub-0.35V VDD [10.1109/E3S.2013.6705875].

Full-quantum simulation of heterojunction TFET inverters providing better performance than multi-gate CMOS at sub-0.35V VDD

BARAVELLI, EMANUELE;GNANI, ELENA;GNUDI, ANTONIO;REGGIANI, SUSANNA;BACCARANI, GIORGIO
2013

Abstract

Tunnel FETs (TFETs) are promising alternatives to the conventional CMOS technology for steeper-than-60mV/dec subthreshold slopes (SS) required to limit power consumption of integrated circuits [1]. Current challenges for TFET integration into practical circuit applications include reaching acceptable ION levels, suppressing ambipolar effects, improving output characteristics [2], and simultaneously co-integrating optimized n-and p-type devices. All of these issues are carefully taken into account in this work. Device- and circuit-level design of TFET inverters is proposed, based on co-optimized n-and p-type TFETs integrated on the same InAs/ Al0.05Ga0.95Sb platform. A full-band quantum simulation approach is adopted to properly account for quantum effects which strongly influence TFET device, and hence circuit, performance. This advances the state of the art of TFET-based circuit literature, which is mostly based on simplified TCAD models [3], with rare calibrations against atomistic calculations [4].
2013
2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S)
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E. Baravelli, E. Gnani, A. Gnudi, S. Reggiani, G. Baccarani (2013). Full-quantum simulation of heterojunction TFET inverters providing better performance than multi-gate CMOS at sub-0.35V VDD [10.1109/E3S.2013.6705875].
E. Baravelli; E. Gnani; A. Gnudi; S. Reggiani; G. Baccarani
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/238887
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