In this work we investigate the achievable device performance of steep-slope nanowire FETs based on the filtering of the high-energy electrons via a superlattice heterostructure in the source extension. Four material pairs are investigated for the superlattice (SL), with the aim to identify the most promising ones with respect to the typical FET evaluation metrics. We found that the InGaAs-InAlAs pair can provide an inverse subthreshold slope SS = 13 mV/dec and an on-state current ION = 4.5 mA/μm@VDD = 0.4V. These results outperform the ITRS requirements for the 21 nm technology node.
Gnani, E., Maiorano, P., Reggiani, S., Gnudi, A., Baccarani, G. (2011). Performance Limits of Superlattice-Based Steep-Slope Nanowire FETs. PISCATAWAY, NJ 08855-1331 : IEEE [10.1109/IEDM.2011.6131491].
Performance Limits of Superlattice-Based Steep-Slope Nanowire FETs
GNANI, ELENA;MAIORANO, PASQUALE;REGGIANI, SUSANNA;GNUDI, ANTONIO;BACCARANI, GIORGIO
2011
Abstract
In this work we investigate the achievable device performance of steep-slope nanowire FETs based on the filtering of the high-energy electrons via a superlattice heterostructure in the source extension. Four material pairs are investigated for the superlattice (SL), with the aim to identify the most promising ones with respect to the typical FET evaluation metrics. We found that the InGaAs-InAlAs pair can provide an inverse subthreshold slope SS = 13 mV/dec and an on-state current ION = 4.5 mA/μm@VDD = 0.4V. These results outperform the ITRS requirements for the 21 nm technology node.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
