A wide range of Internet of Things (IoT) applications require powerful, energy-efficient, and flexible end nodes to acquire data from multiple sources, process and distill the sensed data through near-sensor data analytics algorithms, and transmit it wirelessly. This work presents Arnold: A 0.5-To-0.8-V, 46.83-mu ext{W} /MHz, 600-MOPS fully programmable RISC-V microcontroller unit (MCU) fabricated in 22-nm Globalfoundries GF22FDX (GF22FDX) technology, coupled with a state-of-The-Art (SoA) microcontroller to an embedded field-programmable gate array (eFPGA). We demonstrate the flexibility of the system-on-chip (SoC) to tackle the challenges of many emerging IoT applications, such as interfacing sensors and accelerators with nonstandard interfaces, performing on-The-fly preprocessing tasks on data streamed from peripherals, and accelerating near-sensor analytics, encryption, and machine learning tasks. A unique feature of the proposed SoC is the exploitation of body-biasing to reduce leakage power of the eFPGA fabric by up to 18 imes at 0.5 V, achieving SoA state bitstream-retentive sleep power for the eFPGA fabric, as low as 20.5mu ext{W}. The proposed SoC provides 3.4 imes better performance and 2.9 imes better energy efficiency than other fabricated heterogeneous reconfigurable SoCs of the same class.

Arnold: An eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End Nodes

Rossi D.;Benini L.
2021

Abstract

A wide range of Internet of Things (IoT) applications require powerful, energy-efficient, and flexible end nodes to acquire data from multiple sources, process and distill the sensed data through near-sensor data analytics algorithms, and transmit it wirelessly. This work presents Arnold: A 0.5-To-0.8-V, 46.83-mu ext{W} /MHz, 600-MOPS fully programmable RISC-V microcontroller unit (MCU) fabricated in 22-nm Globalfoundries GF22FDX (GF22FDX) technology, coupled with a state-of-The-Art (SoA) microcontroller to an embedded field-programmable gate array (eFPGA). We demonstrate the flexibility of the system-on-chip (SoC) to tackle the challenges of many emerging IoT applications, such as interfacing sensors and accelerators with nonstandard interfaces, performing on-The-fly preprocessing tasks on data streamed from peripherals, and accelerating near-sensor analytics, encryption, and machine learning tasks. A unique feature of the proposed SoC is the exploitation of body-biasing to reduce leakage power of the eFPGA fabric by up to 18 imes at 0.5 V, achieving SoA state bitstream-retentive sleep power for the eFPGA fabric, as low as 20.5mu ext{W}. The proposed SoC provides 3.4 imes better performance and 2.9 imes better energy efficiency than other fabricated heterogeneous reconfigurable SoCs of the same class.
Schiavone P.D.; Rossi D.; Di Mauro A.; Gurkaynak F.K.; Saxe T.; Wang M.; Yap K.C.; Benini L.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11585/859966
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