In the last decade, a growing number of electronic devices have been designed to be deployed in safety-critical autonomous systems. Many application domains, such as autonomous vehicles, robots, nano-drones, are exploring artificial intelligence solutions to handle the increasing computation requirements. Besides, due to their safety-critical application scenarios, they are demanding for even more reliable and advanced systems. These requirements clearly entail a growing complexity in modern processors and System-on-a-Chip design, leading to new efforts in verification and testing phases. These new devices must be also compliant with emerging functional safety standards that regulate their usage during the entire lifetime. The main intent of this work is to improve the reliability of autonomous systems, providing a strategy to link the verification methodology with the testing one. Starting from an almost exhaustive verification set, it is possible to derive a different set of patterns intended for on-line testing. This achievement is gained by taking into account the constraints due to the final system application and the common requirements of the embedded devices used in autonomous systems. Experimental results are provided on an open-source RISC-V processor assembled on an autonomous nano-drone.

Ruospo A., Cantoro R., Sanchez E., Schiavone P.D., Garofalo A., Benini L. (2019). On-line testing for autonomous systems driven by RISC-V processor design verification. Institute of Electrical and Electronics Engineers Inc. [10.1109/DFT.2019.8875345].

On-line testing for autonomous systems driven by RISC-V processor design verification

Garofalo A.;Benini L.
2019

Abstract

In the last decade, a growing number of electronic devices have been designed to be deployed in safety-critical autonomous systems. Many application domains, such as autonomous vehicles, robots, nano-drones, are exploring artificial intelligence solutions to handle the increasing computation requirements. Besides, due to their safety-critical application scenarios, they are demanding for even more reliable and advanced systems. These requirements clearly entail a growing complexity in modern processors and System-on-a-Chip design, leading to new efforts in verification and testing phases. These new devices must be also compliant with emerging functional safety standards that regulate their usage during the entire lifetime. The main intent of this work is to improve the reliability of autonomous systems, providing a strategy to link the verification methodology with the testing one. Starting from an almost exhaustive verification set, it is possible to derive a different set of patterns intended for on-line testing. This achievement is gained by taking into account the constraints due to the final system application and the common requirements of the embedded devices used in autonomous systems. Experimental results are provided on an open-source RISC-V processor assembled on an autonomous nano-drone.
2019
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019
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6
Ruospo A., Cantoro R., Sanchez E., Schiavone P.D., Garofalo A., Benini L. (2019). On-line testing for autonomous systems driven by RISC-V processor design verification. Institute of Electrical and Electronics Engineers Inc. [10.1109/DFT.2019.8875345].
Ruospo A.; Cantoro R.; Sanchez E.; Schiavone P.D.; Garofalo A.; Benini L.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/730300
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