Multimedia streaming applications running on next-generation parallel multiprocessor arrays in sub-45nm technology face new challenges related to device and process variability, leading to performance and power variations across the cores. In this context, Quality of Service (QoS), as well as energy efficiency, could be severely impacted by variability. In this work we propose a run-time variability-aware workload distribution technique for enhancing real-time predictability and energy efficiency based on an innovative Linear-Programming + Bin-Packing formulation which can be solved in linear time. We demonstrate our approach on the virtual prototype of a next-generation industrial multi-core platform running a multithread MPEG2 decoder. Experimental results confirm that our technique compensates variability, while improving energy-efficiency and minimizing deadline violations in presence of performance and power variations across the cores.

Variability-Aware Task Allocation for Energy-Efficient Quality of Service Provisioning in Embedded Streaming Multimedia Applications

PATERNA, FRANCESCO;ACQUAVIVA, ANDREA;CAPRARA, ALBERTO;BENINI, LUCA
2012

Abstract

Multimedia streaming applications running on next-generation parallel multiprocessor arrays in sub-45nm technology face new challenges related to device and process variability, leading to performance and power variations across the cores. In this context, Quality of Service (QoS), as well as energy efficiency, could be severely impacted by variability. In this work we propose a run-time variability-aware workload distribution technique for enhancing real-time predictability and energy efficiency based on an innovative Linear-Programming + Bin-Packing formulation which can be solved in linear time. We demonstrate our approach on the virtual prototype of a next-generation industrial multi-core platform running a multithread MPEG2 decoder. Experimental results confirm that our technique compensates variability, while improving energy-efficiency and minimizing deadline violations in presence of performance and power variations across the cores.
Paterna F. ; Acquaviva A. ; Caprara A. ; Papariello F. ; Desoli G. ; Benini L.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11585/108920
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