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EnglishIn this paper we address the issue of improving ECC correction ability beyond that provided by the standard SEC/DED Hsiao code. We analyze the impact of the standard SEC/DED Hsiao ECC and for several double error correcting (DEC) codes on area overhead and cache memory access time for different codeword sizes and code-segment sizes, as well as their correction ability as a function of codeword/codesegment sizes. We show the different trade-offs that can be achieved in terms of impact on area overhead, performance and correction ability, thus giving insight to designers for the selection of the optimal ECC and codeword organization/codesegment size for a given application.
| Titolo: | Error correcting code analysis for cache memory high reliability and performance |
| Autore/i: | ROSSI, DANIELE; N. Timoncini; M. Spica; METRA, CECILIA |
| Autore/i Unibo: | |
| Anno: | 2011 |
| Titolo del libro: | Proceedings Design, Automation and Test in Europe Conference and Exhibition |
| Pagina iniziale: | 1 |
| Pagina finale: | 6 |
| Digital Object Identifier (DOI): | http://dx.doi.org/10.1109/DATE.2011.5763257 |
| Abstract: | In this paper we address the issue of improving ECC correction ability beyond that provided by the standard SEC/DED Hsiao code. We analyze the impact of the standard SEC/DED Hsiao ECC and for several double error correcting (DEC) codes on area overhead and cache memory access time for different codeword sizes and code-segment sizes, as well as their correction ability as a function of codeword/codesegment sizes. We show the different trade-offs that can be achieved in terms of impact on area overhead, performance and correction ability, thus giving insight to designers for the selection of the optimal ECC and codeword organization/codesegment size for a given application. |
| Data prodotto definitivo in UGOV: | 27-giu-2013 |
| Appare nelle tipologie: | 4.01 Contributo in Atti di convegno |
File in questo prodotto:
http://hdl.handle.net/11585/106884
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