A conventional silicon-controlled rectifier integrated into a laterally diffused MOSFET (SCR-LDMOS) is studied through 2D TCAD simulations in order to obtain the maximum holding voltage without increasing the area consumption or degrading the power-to-failure robustness. A reference device with 150V trigger voltage, 3V holding voltage and an approximate thermal breakdown at 30 mA/μm is adopted. Different configurations of the drain-side region are compared, with the best solution showing a 5x improvement on the holding condition without a significant variation on the other figures of merit.
Zunarelli, L., Rotorato, S., Gnani, E., Reggiani, S., Sankaralingam, R., Dissegna, M., et al. (2025). Optimization of the drain-side configuration in ESD-protection SCR-LDMOS for high holding-voltage applications. MICROELECTRONICS RELIABILITY, 168, 1-7 [10.1016/j.microrel.2025.115664].
Optimization of the drain-side configuration in ESD-protection SCR-LDMOS for high holding-voltage applications
Zunarelli L.;Gnani E.;Reggiani S.
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2025
Abstract
A conventional silicon-controlled rectifier integrated into a laterally diffused MOSFET (SCR-LDMOS) is studied through 2D TCAD simulations in order to obtain the maximum holding voltage without increasing the area consumption or degrading the power-to-failure robustness. A reference device with 150V trigger voltage, 3V holding voltage and an approximate thermal breakdown at 30 mA/μm is adopted. Different configurations of the drain-side region are compared, with the best solution showing a 5x improvement on the holding condition without a significant variation on the other figures of merit.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
