AZARKHISH, ERFAN
 Distribuzione geografica
Continente #
NA - Nord America 893
EU - Europa 315
AS - Asia 178
AF - Africa 14
OC - Oceania 1
Totale 1.401
Nazione #
US - Stati Uniti d'America 891
GB - Regno Unito 99
CN - Cina 77
IT - Italia 65
VN - Vietnam 53
SE - Svezia 41
DE - Germania 37
SG - Singapore 23
IN - India 19
FR - Francia 16
RU - Federazione Russa 15
IE - Irlanda 12
ZA - Sudafrica 10
EE - Estonia 9
FI - Finlandia 8
BE - Belgio 4
CH - Svizzera 4
UA - Ucraina 3
CA - Canada 2
TG - Togo 2
TR - Turchia 2
AU - Australia 1
CI - Costa d'Avorio 1
EG - Egitto 1
IR - Iran 1
LB - Libano 1
PL - Polonia 1
RO - Romania 1
TW - Taiwan 1
UZ - Uzbekistan 1
Totale 1.401
Città #
Ann Arbor 328
Southend 89
Fairfield 75
Ashburn 71
Chandler 47
Wilmington 46
Woodbridge 46
Cambridge 39
Dong Ket 39
Houston 36
Seattle 34
Princeton 20
Singapore 20
Bologna 19
Turin 15
Dublin 12
Beijing 11
Jinan 9
Padova 9
Westminster 9
Berlin 8
Helsinki 8
Nanjing 8
Saint Petersburg 8
Washington 8
Shenyang 6
Florence 5
Medford 5
Brussels 4
Haikou 4
Jiaxing 4
Shanghai 4
Changsha 3
Falls Church 3
Santa Clara 3
Boardman 2
Hangzhou 2
Hebei 2
Hounslow 2
Istanbul 2
Lodi 2
Lomé 2
Nanchang 2
Norwalk 2
Olalla 2
Redmond 2
San Diego 2
Taiyuan 2
Taizhou 2
Tianjin 2
Zhengzhou 2
Abidjan 1
Beauharnois 1
Cernusco Sul Naviglio 1
Chicago 1
Chongqing 1
Damietta 1
Dearborn 1
Fayetteville 1
Frankfurt Am Main 1
Fremont 1
Guangzhou 1
Inzago 1
Kashan 1
Las Vegas 1
Linfen 1
London 1
Milan 1
Muizenberg 1
Netstal 1
New York 1
Niagara Falls 1
Ningbo 1
Nuremberg 1
Phoenix 1
Poznan 1
Rende 1
Rome 1
Rueil-malmaison 1
Springfield 1
Taipei 1
Tappahannock 1
Vicenza 1
Wenzhou 1
Totale 1.120
Nome #
Neurostream: Scalable and Energy Efficient Deep Learning with Smart Memory Cubes 171
A case for three-dimensional stacking of tightly coupled data memories over multi-core clusters using low-latency interconnects 168
3D logarithmic interconnect: Stacking multiple L1 memory dies over multi-core clusters2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS) 165
A high-performance multiported L2 memory IP for scalable three-dimensional integration2013 IEEE International 3D Systems Integration Conference (3DIC) 153
Logic-Base Interconnect Design for Near Memory Computing in the Smart Memory Cube 153
A Hybrid Instruction Prefetching Mechanism for Ultra Low-Power Multicore Clusters 150
Design and evaluation of a processing-in-memory architecture for the smart memory cube 140
High Performance AXI-4.0 Based Interconnect for Extensible Smart Memory Cubes 140
A Modular Shared L2 Memory Design for 3-D Integration 137
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge 52
Totale 1.429
Categoria #
all - tutte 3.053
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 3.053


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020266 0 0 0 21 34 30 45 32 56 17 15 16
2020/2021136 25 10 4 1 12 6 8 4 19 11 8 28
2021/2022548 51 7 65 42 64 55 51 45 59 20 55 34
2022/2023206 14 33 12 20 17 14 4 16 35 1 20 20
2023/202473 7 17 10 0 9 21 1 0 0 6 2 0
2024/202558 7 22 18 11 0 0 0 0 0 0 0 0
Totale 1.429