This paper presents a readout scheme for Analog In-memory Computing (AIMC) based on an embedded Phase-change Memory (ePCM). Conductance time drift is overcome with a hardware compensation technique based on a reference cell conductance tracking (RCCT). Accuracy drop due to circuits mismatch and variability involved in the computational chain are minimized with an optimized iterative program-and-verify algorithm applied to the PCM devices. The proposed AIMC scheme is designed and manufactured in a 90-nm STMicroelectronics CMOS technology, with the aim of adding a signed Multiply-and-Accumulate (MAC) computation feature to a Ge-rich GeSbTe (GST) embedded PCM array. Experimental characterizations are performed under different operating conditions, and show that mean MAC decrease in time is approximately null at room temperature and reduced by a factor of 3 after 64-hours bake at 85∘C. Based on several MAC operations, the estimated 512×512 Matrix-Vector-Multiplication (MVM) accuracy is 97.4%, whose decrease in time is less than 3% in the worst case.
Antolini, A., Lico, A., Zavalloni, F., Scarselli, E.F., Gnudi, A., Torres, M.L., et al. (2024). A Readout Scheme for PCM-Based Analog in-Memory Computing With Drift Compensation Through Reference Conductance Tracking. IEEE OPEN JOURNAL OF SOLID-STATE CIRCUITS, 4, 69-82 [10.1109/ojsscs.2024.3432468].
A Readout Scheme for PCM-Based Analog in-Memory Computing With Drift Compensation Through Reference Conductance Tracking
Antolini, Alessio
Primo
;Lico, Andrea;Zavalloni, Francesco;Scarselli, Eleonora Franchi;Gnudi, Antonio;
2024
Abstract
This paper presents a readout scheme for Analog In-memory Computing (AIMC) based on an embedded Phase-change Memory (ePCM). Conductance time drift is overcome with a hardware compensation technique based on a reference cell conductance tracking (RCCT). Accuracy drop due to circuits mismatch and variability involved in the computational chain are minimized with an optimized iterative program-and-verify algorithm applied to the PCM devices. The proposed AIMC scheme is designed and manufactured in a 90-nm STMicroelectronics CMOS technology, with the aim of adding a signed Multiply-and-Accumulate (MAC) computation feature to a Ge-rich GeSbTe (GST) embedded PCM array. Experimental characterizations are performed under different operating conditions, and show that mean MAC decrease in time is approximately null at room temperature and reduced by a factor of 3 after 64-hours bake at 85∘C. Based on several MAC operations, the estimated 512×512 Matrix-Vector-Multiplication (MVM) accuracy is 97.4%, whose decrease in time is less than 3% in the worst case.File | Dimensione | Formato | |
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A_Readout_Scheme_for_PCM-Based_Analog_In-Memory_Computing_With_Drift_Compensation_Through_Reference_Conductance_Tracking.pdf
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