To meet the growing need for computational power for DNNs, multiple specialized hardware architectures have been proposed. Each DNN layer should be mapped onto the hardware with the most efficient schedule, however, SotA schedulers struggle to consistently provide optimum schedules in a reasonable time across all DNN-HW combinations. This paper proposes SALSA, a fast dual-engine scheduler to generate optimal execution schedules for both even and uneven mapping. We introduce a new strategy, combining exhaustive search with simulated annealing to address the dynamic nature of the loop ordering design space size across layers. SALSA is extensively benchmarked against two SotA schedulers, LOMA [1] and Timeloop [2] on 5 different DNNs, on average SALSA finds schedules with 11.9% and 7.6% lower energy while speeding-up the search by 1.7× and 24× compared to LOMA and Timeloop, respectively.

Jung, V.J.B., Symons, A., Mei, L., Verhelst, M., Benini, L. (2023). SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators [10.1109/AICAS57966.2023.10168625].

SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators

Benini, Luca
2023

Abstract

To meet the growing need for computational power for DNNs, multiple specialized hardware architectures have been proposed. Each DNN layer should be mapped onto the hardware with the most efficient schedule, however, SotA schedulers struggle to consistently provide optimum schedules in a reasonable time across all DNN-HW combinations. This paper proposes SALSA, a fast dual-engine scheduler to generate optimal execution schedules for both even and uneven mapping. We introduce a new strategy, combining exhaustive search with simulated annealing to address the dynamic nature of the loop ordering design space size across layers. SALSA is extensively benchmarked against two SotA schedulers, LOMA [1] and Timeloop [2] on 5 different DNNs, on average SALSA finds schedules with 11.9% and 7.6% lower energy while speeding-up the search by 1.7× and 24× compared to LOMA and Timeloop, respectively.
2023
2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)
1
5
Jung, V.J.B., Symons, A., Mei, L., Verhelst, M., Benini, L. (2023). SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators [10.1109/AICAS57966.2023.10168625].
Jung, Victor J. B.; Symons, Arne; Mei, Linyan; Verhelst, Marian; Benini, Luca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/958507
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