Modeling the Thermal and Power Control Subsystem in HPC Processors

In the last decade, high-performance multi-core processors have become pervasive. Processors with high cores count, multi-die SoC configuration with multiple heterogeneous units, and accelerators are commonplace today, while tailored and specific operating points are required for efficient execution of applications. In this scenario, an advanced and configurable Power Controller System (PCS) is essential to meet power and thermal constraints, as it is not effective to rely on simple reactive control policies with static conservative margins on the operating points. This paper provides a mathematical model of an HPC processor and the different control approaches implemented in state-of-the-art PCS solutions. In particular, we are comparing the performance of a custom cascade model-based control algorithm that favors cores executing more demanding workloads with the IBM Power9 control algorithm used as a reference design. The results show an average increase in the number of retired instructions of 3.46 %, with a peak of 6.45 % increase for the cores executing more demanding instructions. - Modeling, Simulation, Nonlinear systems