This article introduces an open-source, low-latency Network-on-Chip (NoC) designed to tackle bandwidth challenges faced by traditional narrow and serialized NoCs. The authors demonstrate the effectiveness of wide channels by integrating a 5 × 5 router and links within a 9-core compute cluster using 12-nm FinFet technology.

Fischer, T., Rogenmoser, M., Cavalcante, M., Gürkaynak, F.K., Benini, L. (2023). FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic. IEEE DESIGN & TEST, 40(6), 7-17 [10.1109/MDAT.2023.3306720].

FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic

Benini, Luca
2023

Abstract

This article introduces an open-source, low-latency Network-on-Chip (NoC) designed to tackle bandwidth challenges faced by traditional narrow and serialized NoCs. The authors demonstrate the effectiveness of wide channels by integrating a 5 × 5 router and links within a 9-core compute cluster using 12-nm FinFet technology.
2023
Fischer, T., Rogenmoser, M., Cavalcante, M., Gürkaynak, F.K., Benini, L. (2023). FlooNoC: A Multi-Tb/s Wide NoC for Heterogeneous AXI4 Traffic. IEEE DESIGN & TEST, 40(6), 7-17 [10.1109/MDAT.2023.3306720].
Fischer, Tim; Rogenmoser, Michael; Cavalcante, Matheus; Gürkaynak, Frank K.; Benini, Luca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/956434
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