Development and Validation of a Smart Architecture for Thyristor Valves

A high-voltage thyristor converter is realized by many valve sections, whose volume is approximately occupied for only the 10% by thyristors and for the 10% by the relevant gate drivers. The remaining 80% is taken by passive auxiliary circuits, needed to protect thyristors during turn-on and turn-off commutations. This work represents a preliminary validation of an innovative architecture that aims to reduce the auxiliary circuit cost, volume, and weight of the overall valve, through the investigation of active, instead of passive solutions. The work starts from the investigation of the phenomena behind the valve transient behaviors and proceeds with simulations and experimental tests, using a reduced-scale circuit prototype. The match between the obtained results validates the investigated active configurations, confirming that the proposed solution can be used for improving thyristor valves.