Design of Networks on Chips for 3D ICs

Murali, S.; Benini, Luca; De Micheli, G.

doi:10.1109/ASPDAC.2010.5419902

Three-dimensional integrated circuits, where multiple silicon layers are stacked vertically have emerged recently. The3DICs have smaller form factor, shorter and efficient use of wires and allow integration of diverse technologies in the same device. The use of Networks on Chips (NoCs) to connect components in a 3D chip is a necessity. In this short paper, we present an outline on designing application-specific NoCs for 3D ICs.

Titolo:	Design of Networks on Chips for 3D ICs
Autore/i:	Murali S.; BENINI, LUCA; De Micheli G.
Autore/i Unibo:	Murali S. BENINI, LUCA De Micheli G. mostra contributor esterni nascondi contributor esterni
Anno:	2010
Titolo del libro:	Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific
Pagina iniziale:	167
Pagina finale:	168
Digital Object Identifier (DOI):	http://dx.doi.org/10.1109/ASPDAC.2010.5419902
Abstract:	Three-dimensional integrated circuits, where multiple silicon layers are stacked vertically have emerged recently. The3DICs have smaller form factor, shorter and efficient use of wires and allow integration of diverse technologies in the same device. The use of Networks on Chips (NoCs) to connect components in a 3D chip is a necessity. In this short paper, we present an outline on designing application-specific NoCs for 3D ICs.
Data prodotto definitivo in UGOV:	17-dic-2010
Appare nelle tipologie:	4.01 Contributo in Atti di convegno

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Utilizza questo identificativo per citare o creare un link a questo documento:
http://hdl.handle.net/11585/94675

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