Design of power management mechanisms of hardware components (CPU, memories) in Embedded Systems needs to be performed at OS level to exploit system-level information. Traditional simulation models do not fit well, being too slow to simulate applications with OS-interaction. In this paper we present a high-level simulation framework that extends power state machines to hardware and software components to explore power management policies including OS-level effects faster than traditional approaches.
Operating System Based Simulation Framework for Validation of Power Management Policies in Embedded Systems
ACQUAVIVA, ANDREA;BENINI, LUCA;
2009
Abstract
Design of power management mechanisms of hardware components (CPU, memories) in Embedded Systems needs to be performed at OS level to exploit system-level information. Traditional simulation models do not fit well, being too slow to simulate applications with OS-interaction. In this paper we present a high-level simulation framework that extends power state machines to hardware and software components to explore power management policies including OS-level effects faster than traditional approaches.File in questo prodotto:
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