The International Roadmap for Semiconductors has predicted that starting from the 45-nm technology node, an increase of basic transport properties must be achieved to reach the specs of high-performance devices (“ballistic technology booster”) [1]. The on-current Ion of the MOSFETs is limited to a maximum value Ibl that is reached in the ballistic transport regime [2]–[3]. Hence, improvements of Ion demand an increase of either Ibl or of the ballisticity ratio BR= Ion/ Ibl which is a metric of how close to its upper limit is the on-current of the device. BR values have not significantly improved in recent technologies [4] and are thought to have a modest dependence on the technology node (TN) and on the gate length for conventional silicon MOSFETs. Further improvements in Ibl requires ultra-thin silicon-on-insulator (SOI) with silicon thickness below 10 nm, or non-conventional channel composition [5]. We have extended previous analyses on the role of scattering in the channel and in the drain of decananometer MOSFETs and our results demonstrate that, for the explored LG values, the scattering still controls the on-current , that is much lower than the ballistic limit [6]. We have also compared the results of Monte Carlo (MC) simulations to analytical models for quasi-ballistic transport available in the literature [2], [3]. These models provide useful physical insight as they correctly link the achievable on-current to the scattering events taking place in the channel region where a voltage drop equal to occurs (KT layer). However, quantitative predictive analysis of the on-current in short MOSFETs would require a two-dimensional (2-D) self-consistent simulation because the information concerning the position of the virtual-source (location of the potential-energy maximum), the extension of the KT-layer and the mean free path are not known a priori. Self-consistent MC simulation represents the ideal tool for this analysis as it can handle the progressive transition from scattering-dominated transport to quasi-ballistic transport, that occurs as the channel length is scaled to values close to the carrier mean free path. In this frame we present a systematic study of bulk and UTB-DG MOSFETs designed according to the ITRS specs, in order to understand to which extent ballistic transport is going to affect devices with channel lengths down to 14 nm. The results point out that UTB-DG MOSFETs allow to get closer to the ballistic limit compared to bulk devices.

E.Sangiorgi, S.Eminente, C.Fiegna, P.Palestri, D.Esseni, L.Selmi (2007). Quasiballistic Transport in Nano-MOSFETs. HOBOKEN, NJ : John Wileay and Sons [10.1002/9780470168264.ch25].

Quasiballistic Transport in Nano-MOSFETs

SANGIORGI, ENRICO;FIEGNA, CLAUDIO;
2007

Abstract

The International Roadmap for Semiconductors has predicted that starting from the 45-nm technology node, an increase of basic transport properties must be achieved to reach the specs of high-performance devices (“ballistic technology booster”) [1]. The on-current Ion of the MOSFETs is limited to a maximum value Ibl that is reached in the ballistic transport regime [2]–[3]. Hence, improvements of Ion demand an increase of either Ibl or of the ballisticity ratio BR= Ion/ Ibl which is a metric of how close to its upper limit is the on-current of the device. BR values have not significantly improved in recent technologies [4] and are thought to have a modest dependence on the technology node (TN) and on the gate length for conventional silicon MOSFETs. Further improvements in Ibl requires ultra-thin silicon-on-insulator (SOI) with silicon thickness below 10 nm, or non-conventional channel composition [5]. We have extended previous analyses on the role of scattering in the channel and in the drain of decananometer MOSFETs and our results demonstrate that, for the explored LG values, the scattering still controls the on-current , that is much lower than the ballistic limit [6]. We have also compared the results of Monte Carlo (MC) simulations to analytical models for quasi-ballistic transport available in the literature [2], [3]. These models provide useful physical insight as they correctly link the achievable on-current to the scattering events taking place in the channel region where a voltage drop equal to occurs (KT layer). However, quantitative predictive analysis of the on-current in short MOSFETs would require a two-dimensional (2-D) self-consistent simulation because the information concerning the position of the virtual-source (location of the potential-energy maximum), the extension of the KT-layer and the mean free path are not known a priori. Self-consistent MC simulation represents the ideal tool for this analysis as it can handle the progressive transition from scattering-dominated transport to quasi-ballistic transport, that occurs as the channel length is scaled to values close to the carrier mean free path. In this frame we present a systematic study of bulk and UTB-DG MOSFETs designed according to the ITRS specs, in order to understand to which extent ballistic transport is going to affect devices with channel lengths down to 14 nm. The results point out that UTB-DG MOSFETs allow to get closer to the ballistic limit compared to bulk devices.
2007
Future Trands in Microelectronics. Up the Nano Creek
287
295
E.Sangiorgi, S.Eminente, C.Fiegna, P.Palestri, D.Esseni, L.Selmi (2007). Quasiballistic Transport in Nano-MOSFETs. HOBOKEN, NJ : John Wileay and Sons [10.1002/9780470168264.ch25].
E.Sangiorgi;S.Eminente;C.Fiegna;P.Palestri;D.Esseni;L.Selmi
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/61014
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