A low-noise (⩽4 fA/√Hz), broadband (⩾100 kHz) compact architecture and related operation solutions are proposed for portable and low-cost time-domain acquisition of currents with effective resolution in the order of 1 pA and below. The front-end architecture is based on an integrating-differentiating scheme to achieve the optimal performance in terms of input-referred equivalent noise, but it overcomes the typical noise/bandwidth trade-off by making the sampling frequency of the A/D conversion independent from the rate at which the analog front-end is reset. In order to strongly mitigate the main drawback, i.e., the introduction in the system of an inherent time-variance, a Track-and-Hold circuit synchronized with the reset is exploited. For validation purposes, a dual-channel prototype was implemented in a low-cost CMOS technology. The prototype is characterized by standard figures of merit and is experimentally validated by two simple case studies, which are typical of practical applications.
Crescentini, M., Tartagni, M., Morgan, H., Traverso, P.A. (2017). A compact low-noise broadband digital picoammeter architecture. MEASUREMENT, 100, 194-204 [10.1016/j.measurement.2016.12.040].
A compact low-noise broadband digital picoammeter architecture
CRESCENTINI, MARCO;TARTAGNI, MARCO;TRAVERSO, PIER ANDREA
2017
Abstract
A low-noise (⩽4 fA/√Hz), broadband (⩾100 kHz) compact architecture and related operation solutions are proposed for portable and low-cost time-domain acquisition of currents with effective resolution in the order of 1 pA and below. The front-end architecture is based on an integrating-differentiating scheme to achieve the optimal performance in terms of input-referred equivalent noise, but it overcomes the typical noise/bandwidth trade-off by making the sampling frequency of the A/D conversion independent from the rate at which the analog front-end is reset. In order to strongly mitigate the main drawback, i.e., the introduction in the system of an inherent time-variance, a Track-and-Hold circuit synchronized with the reset is exploited. For validation purposes, a dual-channel prototype was implemented in a low-cost CMOS technology. The prototype is characterized by standard figures of merit and is experimentally validated by two simple case studies, which are typical of practical applications.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.