Today's embedded systems require resource-aware acceleration engines, which support advanced cryptographic algorithms such as elliptic-curve cryptography (ECC). The authors present an application-specific co-processor for digital signature verification according to the Elliptic Curve Digital Signature Algorithm (ECDSA) based on the NIST B-233 standard. A novel OpenRISC-ISA (instruction-set architecture) core featuring a high IPC rate and balanced pipeline stages has been developed to act as the main controlling unit of the accelerator. The redesigned OpenRISC core processes 67% more instructions per second than the reference architecture and ties with a micro-controllable ECC datapath through a highly optimized interface. An ECDSA signature is verified in 11 ms, which is equal to a speedup of 15× and 3.3× with respect to a portable C implementation on the OpenRISC and an assembler-optimized implementation on an ARM7, respectively. Moreover, thanks to a tightly coupled data memory, the proposed co-processor does not block the OpenRISC during its ECC-specific operations, thereby enabling it to also support concurrent execution of other workloads and/or software-based cryptographic extension functions.

Gautschi, M., Muehlberghuber, M., Traber, A., Stucki, S., Baer, M., Andri, R., et al. (2014). SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC. Institute of Electrical and Electronics Engineers Inc. [10.1109/ASAP.2014.6868626].

SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC

BENINI, LUCA;
2014

Abstract

Today's embedded systems require resource-aware acceleration engines, which support advanced cryptographic algorithms such as elliptic-curve cryptography (ECC). The authors present an application-specific co-processor for digital signature verification according to the Elliptic Curve Digital Signature Algorithm (ECDSA) based on the NIST B-233 standard. A novel OpenRISC-ISA (instruction-set architecture) core featuring a high IPC rate and balanced pipeline stages has been developed to act as the main controlling unit of the accelerator. The redesigned OpenRISC core processes 67% more instructions per second than the reference architecture and ties with a micro-controllable ECC datapath through a highly optimized interface. An ECDSA signature is verified in 11 ms, which is equal to a speedup of 15× and 3.3× with respect to a portable C implementation on the OpenRISC and an assembler-optimized implementation on an ARM7, respectively. Moreover, thanks to a tightly coupled data memory, the proposed co-processor does not block the OpenRISC during its ECC-specific operations, thereby enabling it to also support concurrent execution of other workloads and/or software-based cryptographic extension functions.
2014
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
25
29
Gautschi, M., Muehlberghuber, M., Traber, A., Stucki, S., Baer, M., Andri, R., et al. (2014). SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC. Institute of Electrical and Electronics Engineers Inc. [10.1109/ASAP.2014.6868626].
Gautschi, Michael; Muehlberghuber, Michael; Traber, Andreas; Stucki, Sven; Baer, Matthias; Andri, Renzo; Benini, Luca; Muheim, Beat; Kaeslin, Hubert...espandi
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/525167
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