The predictability of memory access patterns in embedded systems can be successfully exploited to devise effective application-specific cache optimizations. In this paper, an improved indexing scheme for direct-mapped caches, which drastically reduces the number of conflict misses by using application-specific information, is proposed. The indexing scheme is based on the selection of a subset of the address bits. With respect to similar approaches, the solution has two main strengths. First, owing to an analytical model for the conflict-miss conditions of a given trace, it provides a symbolic algorithm to compute the optimum solution (i.e., the subset of address bits to be used as cache index that minimize the number of conflict misses). Second, owing to a reconfigurable bit selector that can be programmed at run time, it allows the optimal cache indexing to fit to a given application. Results show an average reduction of conflict misses of 24%, measured over a set of standard benchmarks, and for different cache configurations.
K. Patel, E. Macii, M. Poncino, L. Benini (2006). Reducing Conflict Misses by Application-Specific Reconfigurable Indexing. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 25, No. 12, 2626-2637 [10.1109/TCAD.2006.882588].
Reducing Conflict Misses by Application-Specific Reconfigurable Indexing
BENINI, LUCA
2006
Abstract
The predictability of memory access patterns in embedded systems can be successfully exploited to devise effective application-specific cache optimizations. In this paper, an improved indexing scheme for direct-mapped caches, which drastically reduces the number of conflict misses by using application-specific information, is proposed. The indexing scheme is based on the selection of a subset of the address bits. With respect to similar approaches, the solution has two main strengths. First, owing to an analytical model for the conflict-miss conditions of a given trace, it provides a symbolic algorithm to compute the optimum solution (i.e., the subset of address bits to be used as cache index that minimize the number of conflict misses). Second, owing to a reconfigurable bit selector that can be programmed at run time, it allows the optimal cache indexing to fit to a given application. Results show an average reduction of conflict misses of 24%, measured over a set of standard benchmarks, and for different cache configurations.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.