With the diffusion of Java in advanced multimedia mobile devices, there is a growing need for speeding up the execution of Java bytecode beyond the limits of traditional interpreters and just-in-time compilers. In this area, Java coprocessors are viewed as a promising technology, which marries the flexibility of a general-purpose microprocessor to run legacy code and lightweight Java methods, with the high performance of a specialised execution engine on speed-critical bytecode. This work proposes and analyses a microprocessor with FPGA coprocessor architecture with efficient shared-memory communication support. Furthermore, we describe a complete run-time environment that supports dynamic migration of Java methods to the coprocessor, and we quantitatively analyse speedups achievable under a number of system configurations using an accurate complete-system simulator.
E. Lattanzi, A. Gayasen, M. Kandemir, V. Narayanan, L. Benini, A. Bogliolo (2005). Improving Java performance using dynamic method migration on FPGAs. INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS, 1, n. 3/4, 228-236 [10.1504/IJES.2005.009952].
Improving Java performance using dynamic method migration on FPGAs
BENINI, LUCA;
2005
Abstract
With the diffusion of Java in advanced multimedia mobile devices, there is a growing need for speeding up the execution of Java bytecode beyond the limits of traditional interpreters and just-in-time compilers. In this area, Java coprocessors are viewed as a promising technology, which marries the flexibility of a general-purpose microprocessor to run legacy code and lightweight Java methods, with the high performance of a specialised execution engine on speed-critical bytecode. This work proposes and analyses a microprocessor with FPGA coprocessor architecture with efficient shared-memory communication support. Furthermore, we describe a complete run-time environment that supports dynamic migration of Java methods to the coprocessor, and we quantitatively analyse speedups achievable under a number of system configurations using an accurate complete-system simulator.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.